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Brian Bailey

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Brian Bailey explores how IC design teams really work: the struggle for power efficiency and performance, wrestling with semiconductor processes and design methodologies, the challenges of global design teams. How do we somehow herd architecture, IP, design and verification into a successful tape-out?

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Practical Chip Design

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Modeling in layers results in increased productivity

Productivity is related to the way in which we can model something and reliably go from that model to an implementation that meets all of the design goals. In the digital world, we have managed to incrementally increase productivity over time by raising the abstraction, improving the quality of the tools and removing tasks that previously had to be performed manually. Examples of the former... More

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Top-down analog flows. Myth or reality?

There are very few designs these days that are not mixed-signal, meaning that analog functionality has been integrated onto the same die as digital logic. This is being done for several reasons, such as reduced cost, but perhaps more importantly, many analog functions now require some digital logic to allow calibration of the analog circuitry. Traditionally, analog design has been done in a... More

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June Conferences: DAC and Symposium on VLSI Technology and Circuits

Before we know it, it will be summer and that means conferences. First there is the Design Automation Conference (DAC) in San Francisco from June 3 until June 7 and then if you need to be warmed up after the cold San Francisco fog, you can head out to Honolulu for the Symposia on VLSI Technology and Circuits, which runs from June 12 through the 15. What you do in between is totally up to you.... More

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Power integrity -- How much does it matter?

If you have been following my month of power over on the EE Times EDA Designline , you will know that I have been featuring books that tackle the subject of power integrity. It should tell you something that I am featuring four of them — all very different books. This is perhaps a significant indication of the importance and complexity of this subject. Madhavan Swaminantha and A Ege... More

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Time to rethink EDA flows and tool infrastructure

Recently, I have had the pleasure of talking to a number of entrepreneurs within the EDA space and got to hear some of their concerns and recommendations for people thinking about starting a new company. The results of those will be appearing here within EDN and in my EDA Designline blogs. One of the themes running through those interviews has been how much harder it is today compared to... More
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