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Comprehensive coverage of the challenges IC designers face, the most significant technologies produced by providers of EDA (electronic design automation) tools and IP (intellectual property) cores, and the design methodologies other IC designers are using to become successful.

  • Long shots, short shots, and hip shots

    Vance Harwood, consultant, May 10, 2012
    Production of one company's new automatic-test systems screeched to a halt when a simple self-test for the driver output’s path resistance started intermittently failing. What was the cause?  More
  • Do new technologies ease small-scale product innovation?

    Bill Schweber, Contributing Technical Editor, May 10, 2012
    PC-based simulation and tools, manufacturing setups, and production equipment mean that it is easier to develop lower-volume products.  More
  • Remote display technology lets users fully experience cloud content

    Raj Pawate, Distinguished member, Technical Staff, Texas Instruments Incorporated, May 9, 2012
    The cloud can provide content almost anywhere, anytime. Often, however, the device where the content ends up is not ideal for viewing, sharing and experiencing it. Remote display technology provides an effective path around this dilemma.  More
  • High-performance HF transceiver design: A ham's perspective

    Doug Grant, May 3, 2012
    Designers of equipment for radio amateurs face the same problems as designers of most other systems - squeezing the last dB of performance from off-the-shelf components. Some ingenious designs have evolved, using analog, digital and DSP technology.  More
  • Understanding the basics of setup and hold time

    Deepak Behera, Karthik Rao C.G. and Deepak Mahajan, Freescale Semiconductor, April 19, 2012
    Setup and hold times are treated as intrinsic properties of an element. However, it is the very existence of setup and hold time that often confuses us. Here are the cause of setup and hold time within a sequential element (flip-flop) and a look at the operation of the flop.  More
  • EMI problems? Part three: strength of EMI-radiated signals

    Bonnie Baker, Texas Instruments, April 19, 2012
    Now that we have identified EMI sources we are going to see what happens as the signals are radiated towards your boards.  More
  • Sage words of advice from Forte Design Systems founder John Sanguinetti

    Interview conducted and edited by Brian Bailey, April 19, 2012
    John Sanguinetti, the founder and chief technology officer of Forte Design Systems, is an inventor, an entrepreneur, a cancer survivor, and an interesting guy. EDN spoke with him during the recent 2012 Design and Verification Conference in San Jose, CA.  More
  • New power semiconductor technologies challenge assembly and system setups

    Dr. Gerhard Miller, Infineon Technologies, Neubiberg Am Campeon, Germany, April 16, 2012
    While power density and performance rise, higher current densities require operating temperatures up to 200° C and faster switching to prevent losses, assemblies and system setups can't cope. Taking advantage of improved electrical properties requires thermal and electrical assembly technologies featuring very low stray inductances with a 10x to 20x better load-cycling capability at a higher temperature swing.  More
  • Samplify solutions transform processing paradigms at DESIGN West 2012

    Steve Taranovich, Senior Technical Editor, April 12, 2012
    Samplify Systems Inc, a provider of IP solutions, improves multicore I/O bottlenecks/cloud computing (heading off the multicore memory wall), consumer electronics, mobile devices, and supercomputer capacity.  More
  • Optically isolating an I2C interface: Beware of nonlinear propagation delays

    Eric D. Blom, Senior Design Engineer, IXYS-Clare Inc., April 3, 2012
    The usual model of an I2C open-drain bus as a simple, shared pull-up resistor is not instantaneously valid when using bus isolators exhibiting real-world propagation delays. If the delays are not considered in the design of the hardware, then there can be unexpected consequences.  More

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Brian Bailey

Practical Chip Design

Brian Bailey
May 16, 2012
Modeling in layers results in increased productivity
Productivity is related to the way in which we can model something and reliably go...
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Brian Bailey

Practical Chip Design

Brian Bailey
May 2, 2012
Top-down analog flows. Myth or reality?
There are very few designs these days that are not mixed-signal, meaning that...
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Taking the Measure

Rick Nelson, Editor in ChiefRick Nelson, editorial director of Test & Measurement World, comments on test, globalization, measurement, machine vision, economics, nanotechnology, the engineering profession, and more.


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