EDN - July 19, 2007

With rising mask costs, complexity, and tool expenses to develop ASICs and SOCs, many design groups today are opting to implement their production designs in FPGAs. But, before designers make the leap, there are several factors—good and bad—they should consider.

• Departments and Columns
• Analog Domain
• From thin air: Harvesting or scavenging power for remote-sensor applications
• Prying Eyes
• Eviscerating the Xbox 360 Elite
• Scope
• Scope: Hot Chips, handset handwringing, more
• Signal Integrity
• Uncertainty principle: Time and frequency in high-speed digital design
• Supply Chain
• "PC" means "power conscious" in new Energy Star requirements
• ASPs down, but demand solid
• How much will the Qualcomm chip ban impact the global mobile-phone market?
• Tales From The Cube
• Avalanche: Overwhelming input voltage sets off cascade of process-controller failures
• Tapeout
• Where is the BOM in IC design?
• edn.comment
• Qualcomm-IP quagmire launches supply-chain section

• Design Ideas
• High-power LED drivers require no external switches
• Perform PSRR testing with analyzers having no dc-bias ports
• Analyzer tests reverse-recovery behavior of diodes

• Features
• Design Feature
• Autovectorization for GCC compiler
• Interface chips: Between logic and a hard place

• Pulse
• Circuit-design technique could make carbon nanotubes useful
• Dense nanotubes allow efficient interconnect
• Thermoacoustics speaks up at ASA convention