When a flood of data from fast peripherals meets a slow PC-expansion bus, something has to give. And so, with applications in graphics, video, and imaging proliferating rapidly, computer designers are now connecting peripherals directly to a system processor's local bus. But connecting directly to a local bus can result in unpredictable performance, as many designers have learned the hard way. Fortunately, though, help is on the way from the Peripheral Component Interconnect (PCI) bus.

With data throughput as high as 132 Mbytes/sec (even higher in future implementations), the PCI bus smashes the I/O bottleneck of traditional expansion buses. So does the VESA local (VL) bus, for that matter; in fact, the VL bus did it first. But the VL bus is losing ground in the race for market acceptance, mainly because the PCI bus offers a more attractive technology-migration path to the future. In addition, a whole lineup of new products is now making it easier to implement the PCI bus and PCI-compliant peripherals.

Long-range plan prevails

The contest between the PCI and VL buses is much like the race between the tortoise and the hare. VL, developed by the Video Electronics Standards Association, jumped to an early start with a quick-time-to-market solution. It did so, however, with a specification that was somewhat shortsighted and, in the opinion of many designers, rather "casual." PCI, developed by Intel but now an open standard, started more slowly but took a longer range view. PCI components and systems have only recently started appearing on the market, but most designers praise the PCI spec's thoroughness and orientation toward the future.

PCI's forward-looking plan includes processor independence, compatible 32- and 64-bit buses, and a smooth transition from 5 to 3.3V devices (see box, "PCI-bus highlights"). In fact, the PCI bus specification (Ref 1) already contains details for those features. VESA recently added similar features to its VL-bus spec (Ref 2), but not before the PCI bus had already gained a good deal of market momentum. In addition, because the VESA additions increased the VL bus's complexity, they diminished its main selling point—low implementation cost.

Processor independence has contributed a great deal to the PCI bus's success. You can implement the bus on Intel processors, but that doesn't exclude using other processors. For example, Digital Equipment Corp (DEC) is linking PCI to its Alpha processors; Apple, IBM, and Motorola are using it with the Power PC. Any PCI-compliant peripheral works with any of the systems, sparing manufacturers the task of designing models with different interfaces.

The PCI bus is also compatible with standard expansion buses. You can have both bus types connected to the system processor, or, as Fig 1 shows, you can put a slow expansion bus—ISA, EISA, or MicroChannel (MC)—on top of a PCI bus. With PCI-to-PCI bridge chips coming soon from DEC and IBM, you can even put one PCI bus on top of another.

With a secondary PCI bus, you can put multiple peripheral functions on a single add-in card. These functions, if implemented as bus masters, can communicate with each other over the bus without involving the system processor. Access to the system processor is still possible, however, via the two cascaded PCI buses.

PCI peripherals can exist as chips (for use on a mother board or a single-board computer), as add-in cards, or as external devices with a card interface. A typical PCI desktop computer has three PCI-card slots plus two peripheral functions—for example, a graphics accelerator and a LAN—on the mother board. According to rule-of-thumb guidelines for PCI design, you can put 10 electrical loads on the bus. Each mother-board function or bridge chip counts as one load; each card connector counts as two.

PCI add-in cards are mechanically compatible with ISA-, EISA-, or MC-based systems, provided that those systems also have some PCI connectors on the mother board. The PCI-card connector is the MC style, and two types of attachable brackets adapt a standard PCI card for mechanical installation in an ISA/EISA or a MC system. The PCI specification also provides for a smaller 7-in. card, compared with the standard 12.325-in. card.

One of the card slots in a PCI-compliant system can be a "shared" slot that accommodates a PCI card or a standard expansion card. The mother-board PCI connector for a shared slot is very close to the ISA, EISA, or MC connector. The component side of a PCI card is opposite that of the other cards to enable either type of card to fit into roughly the same physical space. You choose which type of card to use; both, obviously, cannot occupy the shared slot at once.

A number of products (Table 1), many of which are just now becoming available, can help you design PCI into your system. Some processors—DEC's Alpha 21066, for example—put the PCI bus on chip. In most cases, however, separate PCI chip sets—sometimes called bridges—essentially create a PCI bus and connect it to a processor's local bus. (Technically speaking, the PCI bus isn't a local bus. It's more like a mezzanine bus that is closely tied to the local bus.)

Other new PCI products add peripherals to your system. Some of these are bridge chips that connect existing standard interfaces—SCSI or IDE, for example—to the PCI bus. Other products are PCI-compliant peripherals implemented as chips or add-in cards. Graphics accelerators and Ethernet controllers are the most prevalent of these.

If you're designing your own PCI-compliant peripheral device, your product options are somewhat limited for now. General-purpose PCI-interface chips aren't yet commercially available, although at least two are in development. PLDs and FPGAs have trouble driving the PCI bus, although Intel says it will introduce some PCI-compatible devices this year.

You can, of course, connect to the PCI bus with an ASIC of your own design. Most ASIC vendors now have PCI drivers in their cell libraries. If you can wait a couple of months, though, the availability of PCI-interface chips could help you avoid the up-front costs of an ASIC.

With PCI-controller chips now in development, you can create a complete interface between a µP and the PCI bus. One controller chip, from American Micro Circuits Corp, interfaces to practically any µP. The chip provides a 32-bit address/data path, all required address decoding, and all the necessary registers and other features for a PCI connection. PLX Technology is developing a similar chip for the i960 µP. Both chips should be available in the second quarter of this year.

For general guidance in PCI design, start with the PCI Special Interest Group (PCI SIG). PCI SIG oversees the PCI specification and provides additional design guidelines that aren't formally specified. The group now has more than 200 member companies; many are developing PCI components and add-in boards. Contact PCI SIG (see box, "For free information... ") for a list.

The next few months will see a flood of PCI products. Some will be new; others will be products that are just now stable enough to warrant volume production. Because PCI is new and its technical specification is fairly de-manding, some early components had difficulty meeting all the spec's requirements.

The PCI bus still faces market competition from the VL bus (see box, "PCI bus vs VL bus"), but the long-range outlook seems to favor PCI. The VL bus's main advantage is that it is essentially the same as the 486 local bus and thus is inexpensive to implement in a 486-based system. As the use of other processors increases, however, the balance will tip to PCI.

Once start-up difficulties subside, the PCI bus could substantially change the "flavor" of PCs, both on the desktop and in embedded systems. By putting peripheral-I/O speeds on a par with processor speeds—and by doing so with standard, high-volume, off-the-shelf components—PCI could make possible a range of products and applications that previously were technically or economically infeasible. The PCI bus could, in fact, become one of the enabling technologies of the decade.

1. "PCI Local Bus Specification, Revision 2.0," PCI Special Interest Group, Hillsboro, OR, 1993.

2. "VL-Bus 2.0," Video Electronics Standards Association, San Jose, CA, 1993.

3. The PCI Local Bus: A Technology Overview, Intel Corp, Santa Clara, CA, 1993.

4. Rowell, Dave, "PCI Local Bus Has Arrived," PC Magazine, November 9, 1993, pg 187.

5. Mosley, JD, "Bypass the PC Bus to Speed up Your System," EDN, February 18, 1993, pg 65.