The clipped-signal correlator in Fig 1 outperforms any resistor-capacitor clipped-signal correlator, and the circuit has no race paths.
The clipped-signal correlator in Fig 1 outperforms any resistor-capacitor clipped-signal correlator, and the circuit has no race paths.
In operation, the reset signal first clears IC3 and IC4 to all zeros. Signals 1 and 2, both of which are clipped so that they resemble square waves, beat against each other in XOR gate IC1. If Signals 1 and 2 are both the same value at the instant the clock signal CK goes low, counter IC3 counts. The clock signal's frequency must be high enough that the clock signal takes five to 20 samples of the IC1's output before IC1 changes state. You have to determine the appropriate clock rate for your application.
IC3 and IC4 are in a race to see which counter finishes first. If IC4 completes its count before IC3, IC6A will clock a zero into shift register IC7. If IC3 completes its count (that is, the inputs are correlated during enough of the sampling period), then IC6A clocks a one into the shift register.
Each one clocked into the shift register IC7 energizes a voltage increment. Summer IC8 totals all of these increments, and comparator IC8 compares the total voltage to a reference voltage. (The figure shows a single shift register for clarity. An actual implementation of this concept used four shift registers in series, yielding a 32-bit comparison.)
To calibrate the circuit for your application, first apply test signals to the inputs. You must use a signal generator that can produce test signals having your required S/N ratio. Then experiment by connecting different combinations of the Q outputs of counter IC4 to the 8-input AND gate, IC5. When you get just the right combination of outputs connected, IC6A outputs equal numbers of ones and zeros. Although this condition may sound vague and difficult to detect, don't worry; when you hit the right combination, the circuit snaps into calibration. Continue experimenting to determine the proper threshold for the summer/comparator circuit.
This circuit works with any logic family and most common op amps. The resistors at IC7's outputs are usually all the same value. You could use differing values, but doing so always causes a processing loss. The circuit's detection-update rate is the rate of the RESET signal, and the integration time is equal to the number of bits of shift register IC7 divided by the RESET signal's rate. (DI #1369)