| FIGURE 3 |
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| Fig 3—From the logic diagram (a) of this sample circuit, you can derive the Karnaugh maps (b) for the next-state variables Z’ and Q’. Combining these maps yields the circuit’s transition map (c). |
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| FIGURE 3 |
|
| Fig 3—From the logic diagram (a) of this sample circuit, you can derive the Karnaugh maps (b) for the next-state variables Z’ and Q’. Combining these maps yields the circuit’s transition map (c). |
back |