
The circuit in Fig 1 monitors 50-Hz mains. IC1, IC2, and their associated circuitry compose a phase shifter. The phase shifter has a 90° delay for 50-Hz inputs and constant gain. The second-order, lowpass, state-variable filter, IC5, sums and filters the outputs of rms-to-dc converters IC3 and IC4.
The circuit's settling time to 1% of final value is 20 msec.
F (p) = 0.5 / (a2p2 + 2kap + 1), where k = 0.7 and a = 0.5 msec.
If the circuit were to have only one rms-to-dc converter, its settling time would be 100 msec.
To reduce the circuit's settling time further, you could parallel more converters, each having a different phase shift. The trick is to set up the phase shifts so as to cancel ripple in the summed signal. (DI #1424)