The circuit in Fig 1 uses the ISD1020A voice-record/playback chip (Information Storage Devices, San Jose, CA, (800) 825-4473) to allow an IBM PC to speak and hear. The analog part of the circuitry comes from the company's application notes. The host PC controls address inputs (A0 through A7), Chip Enable (CE), Playback/Record (P/R), and Power Down (PD). The host also—supposedly—monitors End Of Message flag (EOM).
The ISD1020A latches an address when CE goes low, requiring a 300-nsec setup time. Fortunately, the PC's bus controller automatically inserts several wait states (typically four wait states at 8 MHz) into I/O cycles. Consequently, the circuit needs no intermediate latching, allowing you to tie inputs A0 through A7 directly to the data bus.
A GAL20V8 PLD integrates other interface functions (Listing 1). Because of limited pin count, the PLD uses only one of the PC's data lines. You generate various control patterns by accessing locations within address area 300HEX to 31FHEX. The PC's I/O map reserves these locations for prototype boards. You can download a listing for the PLD as well as a writeup and circuit diagram. (DI #1433)