Design Ideas: June 9, 1994

Three inexpensive ICs in Fig 1's autocalibration circuit correct for both the ADC's offset errors and systematic dc offsets that accumulate before the converter input. An RS flip-flop, a counter, and a low-cost DAC combine to provide the requisite offset correction voltage. When configured in unipolar mode, IC₁, a 12-bit 1.25-Msamples/sec ADC, has a maximum dc offset of ±9 LSBs, which this autocalibration circuit can reduce to less than 1/2 LSB.

IC₁ provides an out-of-range (OTR) signal that indicates when the analog input has exceeded positive or negative full scale. This OTR output drives the reset input of IC_2B. IC_2B and IC_2C form an RS flip-flop. The set input to the flip-flop is an external pulse, STRT_CAL, which initiates the calibration sequence. The width of this pulse must exceed one conversion period for proper circuit operation.

When you apply a STRT_CAL to the circuit, a 74HC393 configured as an 8-bit counter (IC₃) resets to zero. Simultaneously, the Q output of the RS flip-flop goes low, allowing an inverted copy of the ADC's sample clock (ENCODE) to gate through IC_2A. IC_2D inverts the ENCODE pulse such that the counter clocks at the same time as the beginning of conversion. At this point, the analog input of IC₁, AIN1, must be at its zero-level or negative full scale. The current at the IOUTA* node is equal to

where D is the digital input code to IC₄'s DAC. When D equals 0, the current at IOUTA* equals approximately 0.5 mA. The resultant correction voltage that the circuit applies to the AIN2 input of IC₁ approximately equals IOUTA' x R₃, or approximately 25 mV. As the ADC performs subsequent conversions, the counter increments by one count, which in turn decreases the voltage at AIN2. Conversions continue until the OTR pin toggles high, indicating that the AIN1 voltage has been level-shifted 1/2 LSB below negative full scale. Simultaneously, the Q output of the RS flip-flop goes high, which prevents further ENCODE pulses from incrementing the counter. At the maximum count of 255, the voltage at AIN2 is approximately equal to -25 mV. With IC₁'s full-scale input range of 5V p-p, each LSB equals 1.22 mV, which corresponds to a maximum correction range of ±20 LSBs. (DI #1444)