Design Ideas: July 7, 1994
Fig 1's envelope tracking circuit solves the problem of receiving ac-coupled NRZ data over a coaxial data link. Because the spectral content of the NRZ data approaches dc (even with alternate frame inversion), the signal tends to integrate in any ac-coupled stage preceding the zero-crossing detector, despite the low cutoff frequencies. Thus, the dc level of the received data wanders, changing the relative switching point at the comparator.
The system input determines the data pattern, which can have frequencies that beat with the data frame rate, causing the data's envelope to have large excursions. After passing through a transmission medium, the signal is band-limited and has slow edges. Since the zero-crossing detector on the receiving end switches as the data crosses the reference-signal input, the apparent switching point moves if the reference is fixed but the data isn't. This movement can add a considerable amount of jitter to the output signal.
The envelope tracking circuit compensates for this problem by creating a reference voltage that is always centered between the local excursions of the data. The circuit uses the filtered average of positive and negative peak detectors as the reference voltage. The circuit itself is simple; C1 charges on positive peaks through R1 and D1, and C2 charges on negative peaks through R2 and D2. R3 and R4 determine the time constant of the discharge and provide the mean value to the reference pin. C3 provides some noise immunity and should be near the comparator pin. The data rate determines the specific component values. The values chosen here work well with data rates from 0.5 to 1.5 Mbps. R1 and R2 determine the charge-time constant, which should be at least an order of magnitude shorter than the discharge-time constant controlled by R3 and R4.
Other factors that determine component selection are the drive capability of the input source, which must be able to charge the capacitors through the 390 Ohms resistors, and the amplitude of the input signal, which must be greater than two diode drops. Fig 1's values are optimum for a signal of about 3V p-p biased at about 2.5V. You may have to reverse the polarity of C2 if the input is not biased above ground. Circuit performance is not sensitive to any of the component values. (DI #1558)