Analog hardware-description languages (HDLs) are not a substitute for Spice butrather another method for specifying and modeling circuits and systems that can be used with Spice. Analog HDLs have the potential to speed circuit simulation, simplify modeling, and provide a better integration of mixed analog-digital simulation.

Most analog-HDL benefits center around modeling. A key difference between Spice and analog HDLs is circuit behavioral modeling. Behavioral modeling is not new: Spice has behavioral models, and a few analog simulation vendors offer analog HDLs (see Table 1). Analogy has been selling an analog HDL for years. The primary difference between standard versions of Spice and analog HDLs is that analog HDLs' language definitions contain many more primitives that make creating behavioral models easy and direct.

An analog behavioral model does not try to duplicate every functional element of a system, as would an analog functional model. The behavioral model attempts to model device outputs as a function of its inputs. When modeling devices at the lowest level, there is little difference in speed between a functional model and an analog behavioral model. As you model larger blocks of a design, analog behavioral models begin to show advantages in simulation speed. An op-amp behavioral model can be much simpler than a functional model, where you model each transistor, resistor, and capacitor.

Behavioral modeling is a technique. Inherently, a behavioral model is neither accurate nor inaccurate. You don't build the model up from primitive functions but from overall behavior. You can create models that are just as accurate as Spice; you can even make them more accurate than Spice, especially when characterizing the behavior of actual devices. The accuracy of any model is only as good as you have designed it, whether from Spice primitives or from the larger set of language elements in a behavioral language.

You always need to know a model's limitation. A conventional Spice model may be very accurate for some parameters but not for others. If, for example, you are interested in the temperature coefficient of an op amp's offset voltage, you may find a typical Spice model poorly represents the real device. You can build an accurate behavioral model of the offset voltage vs temperature coefficient by using behavioral modeling if you know the behavior of the op amp you are simulating.

Picture One

Large analog designs, including mixed analog-digital designs, provide the major driving force toward analog HDLs. In the past, designers created designs at the schematic level. Using Spice models for each element in the design, you could simulate the circuit. Analog HDLs let you design circuits at a higher level. Instead of creating a functional design at the schematic level, you can create the design at a behavioral level and go directly into simulation. The behavioral description is the model for simulation.

Analog HDLs and behavioral modeling encourage you to work with different levels of models. You can use a Spice functional model or an accurate low-level behavioral model for one part of a system and high-level behavioral models for other system parts. This mixed-level simulation approach provides simulation speed for a system design while maintaining high accuracy in a system block you are developing or verifying.

Picture two

When your task is to design a complex system, you often start by developing a specification for the behavior. You spec what the circuit needs to do before you design the circuit to implement the function. By approaching the design task using a top-down design methodology, you can spec what a system block will do before designing the details for that system block. Behavioral modeling is useful in this case because a functional model doesn't exist until you have developed the design for the system block. A behavioral model can describe the general behavior and let you perform a system simulation to see if the design concept is feasible.

Specifying the design using an analog HDL lets you start with a simple block diagram of a design and add details to it as you refine the design, progressing from concept to implementation. As you begin to implement the design, you can work at the macromodel—and eventually transistor—level, as appropriate for the design.

One significant difference between analog and digital design with HDLs is that you won't be able to access synthesis tools for analog design as you can in digital design. You still have to carry out all the implementation steps. Although the top-down design methodology is more attractive with synthesis tools, it's still useful—even without synthesis tools—in bringing large designs smoothly from concept to implementation. The availability of a standard analog HDL also paves the way for eventual analog synthesis tools.

Mixed analog-digital designs are also encouraging the drive toward analog HDLs. Not only are mixed-signal designs usually large, especially IC-level implementations, they often benefit from a tight coupling between analog and digital design and simulation. As HDLs and top-down design methodologies become prevalent for many digital designers, having a complementary design methodology for the analog portion of a mixed-signal design is an important consideration for efficient design.

Any analog HDL standard that gains most digital designers' approval has to be compatible with VHDL and Verilog. The initial consortium of companies working on an industrywide analog HDL standard settled on VHDL as the working digital standard. The VHDL-Analog (or simply VHDL-A) effort expects to produce a language reference manual (LRM) by the end of 1994 or in early 1995. The group plans to work toward IEEE approval of the standard.

Picture three

Even before the VHDL-A standard is done, Cadence is pushing an effort toward a Verilog-A standard to support its large base of Verilog users. Although a second analog behavioral language for Verilog destroys the hope for a single analog HDL to support, the situation may not be quite as bad as it first appears. Cadence is a strong supporter of both VHDL-A and Verilog-A. Although the company views developing two standards as creating more work, it believes model interoperability is possible, which eases the problem for both end users and companies developing models for devices.

With the effort toward an analog HDL, both designers and Spice-tool vendors share a bit of skepticism. The analog-simulation companies probably have a greater concern about a good standard than even end users do. As a user, if you don't like the language standard, you don't use it. Simulation-tool companies are compelled to sink resources into supporting a new standard if it appears to be at all commercially feasible.

When Wolfram Blume, president of MicroSim, says "There is no room for a poor analog HDL standard," he's focusing on the concerns of many analog-simulation companies. The analog-simulation world has Spice, which is and will continue to be an important industry standard. If the VHDL-A standard is to succeed, it must be a good standard because users will never adopt a mediocre standard while Spice is still viable.

So what's standing in the way of a more evolutionary approach to modifying Spice to add the HDL capability?

Spice macromodels have been used successfully for some time in creating faster simulating models of op amps and other analog building blocks. The largest obstacle to improving simulation speed with Spice macromodels is probably the limited set of primitives available. To relieve this problem, just about every vendor of Spice tools has added proprietary-language extensions to improve behavioral modeling. The new embellishments can often become a liability to end users. As soon as you take advantage of proprietary features, you start to lose model portability. Because models are so important, the model-portability problem is always high on the list of concerns for simulation users.

Companies such as Analog Devices, which provide Spice models for many of the ICs they develop, have to decide which primitives to use in modeling their devices. To make the models useful to the widest audience, the company has to adhere to the most generic Spice standards.

The analog HDL efforts, VHDL-A and Verilog-A, are an attempt to transcend the slow evolution of Spice and to establish industrywide standards, so that analog designers and analog-design tool suppliers can more quickly reap the benefits of an analog HDL industry standard. The effort is not without risk. Rubber-stamping a successful de-facto industry standard is much safer than trying to create a language that will become a successful industry standard.

The bottom line is that Spice will require a lot of additions to build the set of primitives to adequately cover what is needed for analog behavioral modeling. Whether you end up calling those additions VHDL-A, Verilog-A, or modified Spice, the additions are significant.

At the same time, it's important to remember that the analog HDLs must be fully compatible with Spice. For the most part, simulation-tool vendors will continue to use their Spice simulators, and analog HDL will be an additional capability.

An additional concern for some analog designers is having to create all those HDL models. To start with, you can use any Spice model you currently have. You won't get the faster simulation benefits of a behavioral model, but you won't lose any models you already have. Second, if you see your digital counterparts sweating over what appears to be reams of software code cleverly disguised as VHDL, you probably think there has to be a better way. And there is.

You should be able to use graphical building blocks and templates to create your models and system designs. Most simulation companies plan to offer these features to make it easy for designers to become proficient using an analog HDL—without having to learn details of the language.

The language reference manuals that will define VHDL-A and Verilog-A won't specify graphical representations, which will be strictly proprietary developments. Because the models will use the underlying analog HDL, they will be interchangeable, even though the graphic representation will not.