| Picture 1 |
 |
| Combining a novel interface structure with a DRAM core, the Rambus DRAM is able to achieve a 5-Mbyte/sec data burst rate. The Rambus interface is a synchronous to a 250-MHz clock.(Photo courtesy of NEC) |
back |
| Picture 1 |
|
| Combining a novel interface structure with a DRAM core, the Rambus DRAM is able to achieve a 5-Mbyte/sec data burst rate. The Rambus interface is a synchronous to a 250-MHz clock.(Photo courtesy of NEC) |
back |