Design Feature: January 5, 1995

In high-speed digital systems, the finite noise margins for many ICs don't leave much room for supply fluctuations. And, so as not to neglect the analog world, the power-supply rejection ratio (PSRR) of most amplifier ICs diminishes to practically nothing at very high frequencies. That's why it's necessary to provide local bypassing to keep supply lines clean. As clock rates and operating frequencies continue to increase (as they are prone to do in modern systems), your choice of bypass capacitors is no trivial matter.

In the days of yore, bypassing was often an "oh, by-the-way... " afterthought in system design: Throw a disc ceramic here or stick an aluminum electrolytic there—if you remembered to leave room for it. In modern high-speed systems, though, such afterthought engineering can be a recipe for disaster. Designing bypassing into your system should be an integral part of the design effort from the conception of the design.

Picture One

Bypass design involves three variables: how much capacitance is needed, where and how to install it, and what the required characteristics of the bypass elements are. These are important questions; finding the right answers requires careful analysis.

First, how much capacitance is enough? As capacitors are relatively inexpensive, you might be tempted by overkill, throwing in a lot more capacitance than the system requires just to be sure you have enough. This option can be an unwise policy for a couple of reasons. One consequence of overkill is opting for a capacitor with inferior electrical or stability characteristics.

If your system needs, for example, only 10 nF at a certain circuit location and you decide to use 0.47 µF, you might choose a ceramic capacitor with Z5U formulation instead of the X7R formulation of a 10-nF unit. Z5U has vastly inferior temperature-stability and aging characteristics.

The second possible consequence of applying too much capacitance is unnecessarily elevated series inductance. Higher values entail more electrodes—with their associated series inductances. Because a key role of a bypass capacitor is to combat the evil effects of series inductance in supply lines, it's hardly wise to choose a capacitor with unnecessarily high intrinsic series inductance.

How much capacitance?

Questioning bypass-capacitor values relates to a second question, which is where to install the capacitors. There are several answers. The first of these gives the value for the main supply-line bypass for smoothing fluctuations arising from many amps switching through the supply-line inductance. The other answers are for local bypasses, mounted very near ICs or blocks of ICs, designed to counteract glitches produced by the local circuits' fast current wave fronts.

Ref 1 gives a convenient method for calculating the value of the main supply-line bypass. It's based on the maximum step current ([delta]I) you'd expect in the system, the maximum dip ([delta]V) you can tolerate in the supply line, and the series inductance of the supply line. You can calculate this last quantity by using standard formulas from engineering handbooks for inductance/unit length in wires and pc-board traces.

First, calculate the maximum impedance (reactance) the supply line can tolerate. Next, use this impedance and the series inductance to determine the cutoff frequency, ie, the frequency above which the switching currents cause trouble if you provide no bypassing. Finally, using this cutoff frequency and the maximum allowed impedance, calculate the necessary bypass capacitance.

As an example, assume the subsystem is a block of 250 CMOS gates switching 8.2-pF loads in 3 nsec. From the noise-margin budget, you can allow 0.15V dips in the supply voltage. You've calculated the total series inductance in the supply line at 120 nH. The equations for calculating the necessary bypass capacitance are

So, the minimum required bypass capacitance is 62 µF. To allow for tolerance and temperature drift, you could choose a standard value such as 68 µF. This example assumes the use of CMOS gates and pure series inductance (no series resistance) in the supply line. You can, of course, adapt the equations to accommodate other circuit types and series resistance in addition to inductance in the supply line.

This main supply bypass is usually a tantalum or an aluminum electrolytic capacitor. At very high frequencies, these units become inductive, rendering them unsuitable for bypassing extremely fast wave fronts. That's why you need local bypassing, either next to each high-speed IC or near small blocks of ICs.

Ref 2 offers a handy way to calculate the value of local bypass capacitors. You need know only the local-circuit operating current, the allowable supply dip, and the switching time of the circuit block. The following example assumes 100-mA operating current, 0.15V allowable supply dip, and 3-nsec switching time.

You can see that 2 nF suffices to bypass this circuit block. To allow for tolerance and changes with life, you could choose, say, a 2.7- or 3.3-nF unit. Instead of calculating the needed local-bypass values in this way, you might be tempted to just throw in 10- or 100-nF capacitors everywhere—but, again, such overkill can lead to unnecessarily high series inductance in the larger-than-needed bypass elements.

Keep bypasses close to ICs

A bypass capacitor is a shock absorber. When an unbypassed IC switches current into a load, the current comes from the supply line, exits the output pin, and flows through the load into the ground line. Any series impedance in the supply and ground lines causes large local glitches in both lines. The role of the shock-absorber bypass capacitor is to supply these fast transient currents to the IC, so they don't have to come through the supply-line series impedance.

However, a bypass can do its job efficiently only if it's mounted in close proximity to the pins that draw the fast transient currents. If it's any distance away from the IC, the series inductance of the pc-board traces gives the transients an opportunity to develop glitches. Fig 1, adapted from a curve in Ref 2, shows the result of mounting a bypass capacitor various distances from its target IC.

Note that, with the bypass element mounted only 1 in. away from the IC, a transient of about 2.3%, or 0.12V for a 5V supply, can develop at the IC's supply pin. Glitch suppression is not the only reason to mount bypass capacitors close to ICs. The bypass element, and the traces that lead to it, form a current loop—in effect, an antenna for transmitting RFI generated by fast transients. To form the smallest possible RFI antenna, it's important to keep this loop as small as possible.

Length is the bugaboo in high-speed circuitry—not only the length of pc-board traces, but also lead (and electrode) length in the bypass capacitors themselves. Years ago, when computers slogged along at rates of only a few megahertz or lower, the small amount of inductance in a few tenths of an inch trace or lead length was of no consequence. This situation doesn't exist in newer systems, where only a few nanohenries can wreak havoc.

In those old days, bypasses were leaded devices, either cylindrical (axial-leaded) or molded rectangular (radial-leaded) units, suiting placement by automatic-insertion machinery. Hybrid-circuit manufacturers used uncased multilayer ceramics (MLCs), which are small rectangular blocks with metallized ends. With the advent of surface-mount technology and automatic pick-and-place techniques, the uncased MLCs have become the devices of choice for many high-speed, pc-board designs.

MLCs are available in a wide range of sizes. A four-digit number characterizes MLCs' length and width, respectively—for example, a 0603 capacitor measures 0.06×0.03 in. Table 1 provides the capacitance ranges for 50V devices, using the three basic ceramic formulations, from Kemet Electronics Corp (Greenville, SC). The numbers are typical of the ranges offered by all MLC manufacturers.

Adopting uncased MLCs reduces system size, promotes efficient pick-and-place manufacturing, and greatly reduces the series inductance in the bypass capacitors to about 2 nH for MLCs with a 2:1 length-width aspect ratio.

However, at extremely high speeds, even this paltry 2 nH can be objectionable in some cases. The voltage developed in an inductor equals L·di/dt. If the series inductance is 2 nH and the switching time is 2 nsec, the 2×10^-9 terms cancel out, and the voltage (glitch) in millivolts is equal to the incremental current in milliamps. So, if you're switching 100 mA, the glitch is 100 mV; with 1A, it's 1V.

That's why AVX Corp (Myrtle Beach, SC) has developed low-inductance MLCs. Reversing the aspect ratio such that the width exceeds the length, cuts the inductance to less than 0.5 nH. Fig 2a shows the response of a standard, 10-nF 0805 chip to a 200-mA current wave front. The intrinsic inductance of the MLC produces a >200-mV glitch. The same wavefront, applied to a 40-nF 0508 chip, produces a much lower glitch, which Fig 2b shows.

In addition to the single MLCs, AVX produces low-inductance arrays that offer as many as four separate capacitor sections in one ceramic body. These arrays, dubbed LICAs (low-inductance capacitor arrays), use low aspect ratios and other tricks to keep inductance down to the 15- to 120-pH range. To keep interconnect inductance to a minimum, the arrays come in flip-chip formats: with C4 solder balls, thin-film lands, or gold bumps.

AVX is not alone in fighting the series-inductance menace. Circuit Components Inc (Tempe, AZ) has a variety of bypassing products designed to minimize bypass-to-pin distances. The Micro/Q Series ( Fig 3) fits under the IC package and shares pin holes with the IC.

MLC characteristics

In addition to low series inductance, it's usually desirable to have low effective series resistance (ESR), which goes hand-in-hand with a low dissipation factor. But beware: Sometimes, a very low ESR can provoke unexpected problems.

In Ref 3, Bob Pease gives the example shown in Fig 4. Here, you have a long LC resonator, with the power-supply bus acting as a low-loss inductor between each bypass location. When repetitive pulses excite this resonator, high-amplitude ringing can build and produce an exceedingly noisy supply bus. The solution is to place some electrolytic capacitors across the bus. Their high ESR (about 1V) damps the ringing.

In another example (Ref 4), a purely capacitive bypass in conjunction with the supply-line inductance produces ringing in an amplifier's output. In Fig 5, ringing on the supply pin of the 3554 amplifier transmits to the output because of reduced PSRR at high frequencies. The 1V resistor in Fig 4d kills the Q of the LC tank circuit.

As you can see in Table 1, a great deal of overlap exists in the available values for given sizes in the three ceramic formulations. So, choosing the right ceramic material for your application can be tricky business. The three have vastly disparate characteristics, which Fig 6 proves.

C0G (widely misnamed as COG), aka NP0 (widely misnamed as NPO), has the best temperature stability: ±30 ppm/°C max. But its dielectric constant is much lower than that of X7R or Z5U; therefore, a given value requires many more layers (and a higher price). C0G suits frequency-setting applications, for example.

Both X7R and Z5U use ferroelectric materials, which impart some peculiar characteristics to the capacitors. One is aging, somewhat similar to annealing in metals. X7R capacitors, for example, decrease in value by between 1 and 2% per decade. For Z5U devices, the decrease is about 5% per decade. So, a Z5U capacitor whose value is 1 µF at 100 hours has a value of 0.95 µF at 1000 hours, 0.90 µF at 10,000 hours, and so on. A bake-out at a temperature over 125°C restores the original value.

A new dielectric material from KD Components Inc (Carson City, NV) has a high dielectric constant but exhibits no decrease in capacitance with age. The KDA and KDC formulations come in conformally coated, radial-leaded form and cover the capacitance range from 100 pF to 1 µF.

Temperature stability is another concern. X7R is a good compromise; it has a high dielectric constant and, therefore, a reasonable number of layers as well as moderate cost for a given value. And, as Fig 6 shows, X7R's capacitance value drifts only nominally over the operating-temperature range. Z5U is another story: It loses more than 50% in capacitance value at 85µC. Y5V is another high-K formulation with hideous temperature drift.

Another phenomenon to watch for with high-K ceramics is voltage sensitivity. Applying rated dc voltage to an X7R capacitor results in about a 10% drop in capacitance. With Z5U, the decrease is approximately 60%.

Finally, be informed that the high-K dielectrics (except the KDA and KDC formulations mentioned earlier) exhibit a piezoelectric effect, sometimes severe. I speak from experience on this topic. Several years ago, in the design of a miniature aircraft NAV/COMM receiver, I specified some Z5U capacitors as bypasses.

The receiver exhibited seemingly inexplicable shock sensitivity. Tapping a pencil on one of the hybrid circuits produced great glitches in the audio output. It turned out that the mechanical shock produced large capacitance changes in the Z5U capacitors because of the piezoelectric effect. And, just as i=CdV/dt, i=VdC/dt.

As stated earlier, designing a bypassing scheme for high-speed systems is not a trivial task. In the next issue of EDN, watch for an article by Earl McCune of RF Communications Consulting. His article will delve even deeper into the topic of ground-current control and bypassing.

References

1. Johnson, Howard, and Martin Graham, "High-Speed Digital Design," Prentice Hall, Englewood Cliffs, NJ, ISBN 0-13-395724-1.

2. Haznedar, Haldun, "Digital Microelectronics," Benjamin/Cummings Publishing, Redwood City, CA, ISBN 0-8053-2821-1.

3. Pease, Robert, "Troubleshooting Analog Circuits," Butterworth-Heinemann, Stoneham, MA, ISBN 0-7506-9184-0.

4. Travis, Bill, "Use Sound Design Rules to Improve Op-Amp Performance," EDN, May 12, 1983, pg 151.