Design Ideas: January 5, 1995

The circuit in Fig 1 drives a small 24V, 50-Hz motor at about 30 to 40 Hz for use as a chopper motor. The best starting speed for the motor is about half the final running speed. Therefore, the circuit uses an intermediate speed to prevent a stall condition. The circuit uses IC_1Ato count down two cycles after the selection of the intermediate speed. IC_1B's Johnson divide-by-three counter and IC₂'s gates generate the 1208 phase angle for the three motor terminals. The three motor-drive output circuits have a capacitive input that reduces the dc offset to about the level of the op amp. The circuit configures the output as a second-order, lowpass filter to remove the higher harmonics. The resulting waveform causes less cogging of the motor.

Fig 1's circuit has enough gain to cause slight clipping of the output, which increases the drive to the motor and keeps the efficiency high. The output drives to ±14.9V at low load to ±14V at 50 mA. Capacitors at each of the motor-drive's outputs (see C₁ for drive 1) keep the circuit stable when lightly loaded. A short interval of slight oscillation at the onset of clipping in each direction exists without these capacitors.

The following equations define the normal, intermediate, and starting speeds, respectively

where R_GATE is the resistance of the 4013. If you want greater frequency stability, you can use a polystyrene or polypropylene capacitor for C₂ to compensate for the 4066 analog switches' increasing on-resistance as temperature increases. R₅ and R₆ aid in fault-finding by isolating stuck nodes. (DI #1642)