Design Ideas: January 19, 1995
The TMS320C3X-family programmable wait-state generator inFig 1 snoops for memory-mapped devices requiring wait states, simultaneously enabling and loading its wait-state counter.
TMS320C3X data books and application notes describe the most commonly used wait-state generator for the TMS320C3X family of DSPs (digital-signal processors). Although this factory circuit is ideal for explaining the principle of wait-state generation for the TMS320C3X family, it becomes impractical for slow devices that have access times in the half-microsecond or microsecond range (for example, devices such as the old-workhorse WD8250).
The manufacturer's literature suggests using a counter if long delays are necessary. But, if you use counters in a similar fashion to the flip-flops in the original design, you'll find that adding more delay periods costs more and more SSI devices.
Although you could use a 74160 up-counter in the circuit in Fig 1, for predictable results, the up-counter's loaded value must not exceed 9 (whereas a 74161 down-counter can use values up to 15 freely). Because loading in these counters is asynchronous and always overwrites current state (except reset), having a clock running while loading doesn't affect operation.
The chain of EXORs develops a load strobe for the counter. The design uses ordinary TTL devices for the EXOR chain to ensure a sufficient pulse width for the load pulse.
Although the AND gates in the figure are sufficient for most practical purposes, this design can accommodate more inputs by using wider ANDs (for example, the ANDs in Texas Instruments' 5-nsec TLB PAL devices). You can obtain longer delays by cascading counters or using 8-bit MSI counters. Such counters require a slight design change because of their input-load latches.
In addition, a fast, 4-bit-wide, TTL memory IC can replace the three-state buffers. In this case, use a PAL device to decode address strobes to obtain an address for the memory. You must initialize such a memory with the proper values during the reset sequence (or boot sequence for the TMS320C3). Switching between the DSP µP's addresses and the delay memory's addresses during reset should be a simple matter. (DI #1652)