Design Feature: March 16, 1995

Both analog and digital designers use pulse transformers to perform a multitude of functions. This article enables you to quickly and easily design pulse transformers for various applications. A step-by-step design procedure walks you through all the basic stages. PSpice modeling shows you how to verify your design.

In general, a pulse transformer transfers a pulse of current or voltage from the primary, or generating, side of the circuit, to the secondary, or load, side of the circuit. The pulse is usually rectangular, and maintaining the fidelity of its shape is important. As engineers work with increasingly higher frequencies, they must take greater care when designing pulse transformers. Typical applications of pulse transformers include voltage- and current-level transformation, dc isolation, matching impedances, polarity inversion, and providing gate-drive-to-FET or base-drive-to-bipolar transistors.

Taking the mystery out of pulse-transformer design means first understanding the fundamentals. Your requirements probably mandate a transformer with fast rise and fall times along with a minimum of overshoot and ringing. Luckily, you can realize high-performance designs with minimal effort by applying some simple design rules. Simple approximations quickly produce a workable design. You can then optimize your design in-circuit or by using a circuit-analysis tool, such as Spice. Finally, you can either fabricate a custom design or evaluate off-the-shelf pulse transformers.

Anatomy of a pulse

Ideally, a pulse's waveform should be perfectly rectangular, and all signal transitions should take place in zero time. In the real world, pulses can only approximate this ideal. Because current cannot change instantaneously, finite rise and fall times result. Parasitic elements cause overshoot and ringing. And nonideal components cause the flat portions of the pulse to deviate from a perfect plateau. Fig 1 shows a typical nonideal pulse at the output of a pulse transformer. (By convention, the rise time is the time the amplitude of the signal takes to go from 0.1 to 0.9 of its maximum value.)

Fundamentally, a typical pulse has four regions: the rising edge, the flat top of the pulse, the falling edge, and the trailing edge. Therefore, a separate circuit model can represent the pulse transformer in each of the four regions.

Region 1, the rising edge, occurs in response to the transition of the input signal from the low or ground state to a high-level state. Region 2, the flat top of pulse region, occurs later, when rising-edge transients are no longer present and the amplitude of the pulse is approximately a constant value. Region 3, the falling edge, is analogous to the rising edge, with the transition going from a high level to a low level. Region 4, the trailing end, occurs after the falling-edge transients have settled out and the signal is at a constant low level.

The rising and falling edges of the pulse are usually short compared to the flat top or trailing end of the pulse. This fact allows you to consider each region to be somewhat independent of the other regions, greatly simplifying analysis. The analysis can reconstruct the pulse's time period by superposition of the results for each region. The circuit models for each region are tractable using basic circuit-analysis tools and help you extract useful information about the transformer's behavior.

Basic circuit model

Before considering the electrical models for each region of the pulse, first examine a typical circuit employing a pulse transformer (Fig 2a). V_I is the source of the rectangular pulse, or train of pulses, applied to L_P, the primary inductance of the transformer. The characteristic impedance of V_I is the resistance, R_S. L_S represents the secondary inductance of the transformer, which has a 1:n primary-to-secondary turns ratio.

One of three common termination schemes could be on the secondary side of the transformer. The first is R'_ST, a series-terminating resistor. The second is R'_PT, a parallel-terminating resistor. Capacitor C'_pt, the third case, models a capacitive load. These three terminations cover most practical situations without oversimplifying the problem. Your circuit may contain one, two, or all three elements on the secondary side of the transformer.

The equations in this article account for all three terminations; eliminate the terminations that you do not require. If you have a situation that requires additional secondary elements, modify the equations to include them.

The more detailed model in Fig 2b (Ref 1) also represents the ideal transformer. In Fig 2b, an ideal transformer of turns ratio 1:1/a directly follows a nonideal transformer of turns ratio 1:1. V'_O is the output of the model. The term L_L, in the nonideal section, is the leakage reactance of the modeled transformer. This term arises because of the imperfect magnetic coupling between the primary and secondary windings. Term L, the magnetizing inductance, is larger than L_L and appears as a shunt element in the transformer's model.

In Fig 2b, the term K represents the coefficient of coupling.

The primary inductance and the coefficient of coupling define the magnetizing inductance.

Eq 1 represents the leakage inductance, L_L is

This representation of the leakage inductance is convenient. Using an inductance meter, you can easily determine leakage inductance by measuring across the primary with the secondary winding shorted out. Shorting out the secondary's inductance also effectively shorts out the primary's magnetizing inductance, leaving only the leakage inductance.

In Fig 2b, the reciprocal of the turns ratio for the transformer's model is

For the case of the ideal transformer, the coefficient of coupling is unity. As a transformer's characteristics approach this value, its magnetizing inductance, L, becomes approximately equal to its primary inductance, L_P, and the ratio ¹/_a, therefore, approximates the turns ratio, n.

This model assumes that the transformer's core is both linear and lossless. These assumptions are a good approximation for most low-power pulse transformers. The model also assumes that the resistance of the wire that winds the transformer is much smaller than either R_S or R'_ST Consequently, the model omits this term.

Only distributed capacitive elements can accurately model the capacitance of the transformer. But such elements would make the analysis intractable. However, for transformers with a turns ratio of unity or greater, you can make good approximations. To do so, realize that the secondary's capacitance predominates over the primary's capacitance. Thus, a single lumped capacitive element, in shunt with the transformer's secondary, can approximate the transformer's distributed capacitance. In many practical cases, the capacitance of the load is greater than this transformer's shunt capacitance, and the load capacitance is then the dominant term.

If you need a more detailed analysis of the transformer's distributed capacitance, perform a Spice simulation starting with the basic model this article presents and add the appropriate capacitive elements.

Equivalent circuit models for each region

Now, let's take a detailed look at each of the four regions that make up a typical pulse.

Region 1—Rising-edge response

Use the circuit model of Fig 3a to analyze the rising-edge response. This circuit model derives from Fig 2 after making simplifying assumptions. Fig 3a omits the magnetizing inductance of the transformer. This omission is a reasonable simplification because the current that flows through this shunt element during the rise time's short interval is negligible compared with the current that flows though the terminating resistors and the shunt capacitance on the transformer's secondary. A further simplification omits the ideal transformer of Fig 2b. Instead, Fig 3a's model reflects all impedances on the secondary side of the transformer to the primary side by the turns ratio squared. Then,

As you will see, the rising-edge impedance of the pulse source, R_SR, in Fig 3a is not necessarily the same as the source's falling-edge source impedance, R_SF. The distinction is necessary because the pulse generator's sourcing and sinking impedances may not be the same.

Mesh analysis of the circuit in Fig 3a results in an equation with a denominator having roots of the quadratic equation. Therefore, you must consider each of the three possible solutions, depending upon whether the discriminant of the quadratic equation is real, imaginary, or zero. For a real discriminant, the roots of the equation are real and unequal. The resulting response is overdamped. For an imaginary discriminant, the roots occur in complex conjugate pairs. The response is oscillatory or underdamped, with exponential damping. For a zero discriminant, the resultant roots are real and equal, and the response is critically damped.

The damping factor is

Fig 3b is a set of normalized curves of the rising-edge response for various values of xi, the damping factor. The ordinate shows the normalized voltage, V_N, and the abscissa shows the normalized time, t_N. The normalization factors are

Fig 3b shows that the rise times are shortest but the overshoot is also greatest for small values of the damping factor, xi. A large overshoot of the pulse signal is generally undesirable. Conversely, high values of the damping factor result in controlled overshoot but unacceptably long rise times. For most practical designs, choose a damping factor between 0.5 and 1. The resulting response then ranges from underdamped, with varying degrees of overshoot, to critically damped, with no overshoot. The best compromise between fast rise times and excessive overshoot occurs at the slightly underdamped value for xi of about 0.707.

Eq 2 shows that, to achieve small damping factors and short rise times, you must keep the transformer's leakage inductance, L_L, and the signal's source impedance, R_SR, small. Using bifilar windings keeps the transformer's leakage inductance low. You should consider the added distributed capacitance that this winding scheme introduces. But bifilar winding does not usually present a fatal problem (see Ref 2 for further discussions regarding the properties of windings).

Because you usually have little control over the load capacitance, C_PT, judiciously choosing R_ST and R_PT can achieve the desired damping factor, once you establish the leakage inductance and source impedance.

You can calculate the rise time as well as the location on the abscissa of the relative minima and maxima of the underdamped response. To do so, differentiate the solution for the underdamped response with respect to time and set the result equal to zero. The resulting equation, solved for t, is

When m is an odd integer, it defines a local maximum; when m is an even integer it describes a local minimum. To calculate the rise time of the underdamped response from zero to 100% of its value, set m=1, corresponding to the first maximum, and solve for t_R.

Region 2—Flat top-of-pulse response

The approximate circuit model in Fig 4a analyzes the flat top of the pulse. This model assumes that the leakage reactance of the transformer, L_L, as well as the secondary terminating capacitance, C_PT, are fully charged. Consequently, they no longer have any effect upon the circuit and are eliminated. The dominant reactance for this region is the shunt primary magnetizing inductance of the transformer, L.

Following the basic circuit-analysis method used for Fig 3a's circuit, Fig 4a's circuit yields Fig 4b's set of normalized curves. The curves are exponential, plotting normalized time on the horizontal axis and normalized voltage on the vertical axis. Fig 4b shows several curves for the parameter K, where K equals

The linearized forms of the solution of the equations of Fig 4a prove particularly convenient.

Designers often speak of percent droop, P_D, to describe the amount that the pulse deviates from its maximum value in the flat-top region. This quantity, derived from the linearized solution, is

where t_W is the total width of the pulse.

Eq 5 tells you that you must make the magnetizing inductance as large as possible to minimize the percent droop of the pulse. This mandate works contrary to the low-leakage inductance requirement of the leading-edge region. For a given core size, adding more turns of wire achieves a larger magnetizing inductance. However, adding more turns correspondingly increases leakage reactance, as the many turns tend to realize less-than-perfect coupling.

Eq 4 places constraints upon your selections for R_ST and R_PT. R_ST and R_PT form a voltage divider that acts to reduce the level of V_N, the transformer's output. If you use both resistors in your design, you must choose the ratio of these two resistors such that the amplitude of the output voltage remains within your desired limits.

Region 3—Falling-edge response

The approximate circuit model in Fig 5 analyzes the falling-edge response. As for the rising-edge response, the model neglects the transformer's shunt-magnetizing inductance. The change in current through this element is negligible in the brief time of the falling-edge region.

Because the impedance of the pulse generator may differ during this interval from the rising edge's interval, a new quantity, R_SF, represents the fall-time impedance of the signal source. Assume that, initially, the parallel-terminating capacitor, C_PT, is fully charged. You can then write and solve mesh equations with Fig 5's model.

Just as for the rising-edge response, the falling-edge response has three solutions, which depend upon the nature of the discriminant of the quadratic equation. Again, the solutions are the overdamped, critically damped, and underdamped responses. Laplace transform techniques can solve the falling-edge-response mesh equations, yielding results that are similar in form to the rising-edge response's.

In most practical designs, the falling-edge response is satisfactory if the rising-edge response is satisfactory, provided that the source and sink impedance of the drive and the values of the circuit elements remain the same in each interval. However, if the source goes to a high-impedance state after the top of pulse response instead of transitioning low, the analysis results are somewhat different (Refs 3 and 4).

Region 4—Trailing-end region

Fig 6 shows the equivalent circuit for the trailing end of the pulse. This time, the model assumes that the terminating capacitance, C_PT, and the transformer's leakage inductance, L_L, are fully discharged and are, therefore, neglected. In this model, the magnetizing inductance of the transformer is the dominant reactive element. To establish the model's initial conditions, assume that a current, I_O, flows through the magnetizing inductance at time t=0. The form of this response is similar to the response of the flat top of the pulse.

Selecting magnetic materials for pulse transformers

Selecting an appropriate core is important to achieve optimal performance from a pulse transformer. In general, the best materials are those that offer high permeability and large values for BSAT. High permeability ensures that you obtain your desired magnetizing inductance using the fewest turns. Fewer turns help guarantee low leakage reactance, distributed capacitance, and winding resistance. The value of BSAT places limits on the maximum input voltage and minimum frequency that a pulse transformer of a cross-sectional area can support. Ferrites are the most common materials designers use for high-frequency pulse-transformer design, although tape-wound silicon-steel cores are useful for transformers that operate at a few kilohertz or less. The most popular shapes are toroids and ungapped pot cores, but many other shapes also work. Another factor to consider, particularly for high-power designs, is the pulse permeability of the material. Pulse permeability comes into play when the core sees an abrupt change in current flowing through windings surrounding the core. The pulse permeability is always less than the initial permeability of the magnetic material and is primarily a function of the eddy-current losses in the material. It is the magnetic analog of the "skin" effect for electrical conductors, and it reduces the available cross-sectional area of the core. Because ferrites exhibit high resistivity and resultant low eddy-current losses, pulse permeability is less of a problem than with a material such as silicon steel. Some core manufacturers publish pulse-permeability data. Mathematically, pulse permeability (Ref 5) is where The units for B and A are gauss and square centimeters, respectively. Table 1 lists common ferrite materials for pulse transformer-applications. Table 1-Pulse-transformer materials Type Initial permeability (µI) Saturation flux density BSAT (G) Resistivity rho ( ohm-m) Manufacturer J 5000 4300 1 Magnetics Inc W 10000 4300 0.15 Magnetics Inc H 15000 4200 0.1 Magnetics Inc 3E2A 5000 3600 0.1 Philips 3E25 6000 3500 0.1 Philips 3E5 10000 3800 0.01 Philips 77 2000 4600 1 Fair-Rite 75 5000 3900 3 Fair-Rite 76 10000 4000 0.5 Fair-Rite H5B 5000 4200 1 TDK H5B2 7500 4200 0.1 TDK H5C2 10000 4000 0.15 TDK H5D 15000 3200 0.02 TDK N55 5300 4800 0.1 Siemens T35 6000 3800 0.2 Siemens T37 6500 3800 0.2 Siemens

Design example

A step-by-step application of a typical example brings the method together. The example is a pulse transformer that drives the gate of a voltage-controlled power MOSFET. The transistor selected is the industry-standard 2N6796, a 100V, 8A, 0.18 ohm, n-channel device.

The input of the MOSFET looks like a capacitance connected from the gate to the source of the device. This capacitance terminates the secondary side of the pulse transformer. The parallel-terminating capacitor, C_PT, models this capacitance. Actually, two separate parasitic elements in the MOSFET constitute this capacitance: the gate-to-source capacitance, C_GS, and the nonlinear gate-to-drain capacitance, C_GD. To facilitate design, transistor manufacturers have established a quantity, Q_G, or total gate charge, to represent the aggregate effects of these two parasitic capacitances (Ref 6). You will find Q_G in most manufacturers' data sheets. You can derive the total equivalent capacitance by dividing the total gate charge by the gate-to-source voltage

For this example, assume that the pulse transformer has a 1:1 turns ratio. Use the circuit in Fig 2, but replace the parallel-terminating capacitance, C_PT, with the input capacitance C_G. Also, replace the series-terminating resistor, R_ST, with the MOSFET gate-drive resistor, R_G. Because the turns ratio is unity, all primed components in the figure are equivalent to their unprimed counterparts.

Step 1—Calculate C_G, determine R_SR and R_SF, and select V_I and R_PT.

The 2N6796's data sheet lists its total gate charge, Q_G, as 18 nC. Eq 6 yields C_G. Determine R_SR and R_SF from the Thevenin equivalent of the drive stage that provides the input signal to the pulse transformer. I chose V_I to be 12V to ensure that the MOSFET fully saturates. The resistor, R_PT, provides a path to ground that ensures that stray charge does not accumulate on the gate of the MOSFET. Such an accumulation could accidentally turn the device on.

The values are; C_G=1500 pF; R_SR=R_SF=7.5 ohm; V_I=12V; and R_PT=10 k ohm.

Step 2—Using the percent-droop equation, Eq 5, calculate the magnetizing inductance, L.

For this example, assume that K is approximately equal to 1. A later analysis confirms the validity of this assumption. For this example, the input drive signal is 100 kHz with a worst-case duty cycle of 50%. Then, t_W equals 5 µsec. If the desired percent droop is 1%, then, by Eq 5, L=3.75 mH.

Step 3—Select the magnetic core.

I chose a ferrite core for this example. A small, high-permeability toroid is ideal for this application. A Magnetics Inc W40907-TC core has the following characteristics:

• µ=10,000,
• A_E0.135 cm²
• A_L7530.

Choose the operating flux density to be 1.5 kG, and use Eq 7 to verify that the core has sufficient cross-sectional area to support this flux.

where L is in millihenries, V_I is in volts, f is in hertz, A_E is in square centimeters, and B_MAX is in gauss.

A_E calculates to be 0.90 cm², which is less than the core's 0.135-cm² A_E, so the core does not saturate.

Step 4—Calculate the required number of turns for the primary and secondary windings.

Because this example is a 1:1 transformer, its primary and secondary turns are identical. The required turns for L in millihenries are

The desired inductance requires approximately 22 turns. AWG #28 wire in a bifilar-winding configuration fills the toroid to only one layer. This winding scheme ensures tight primary-to-secondary coupling and helps to minimize leakage reactance. The dc resistance of the windings are approximately 0.12 ohm-small compared with the source impedance.

Step 5—Verify B_MAX using the calculated value for N.

This step verifies the actual flux density that the core can expect to see and serves as a check on Step 3. Simply use Eq 7 and solve for B_MAX. If the flux is greater than desired, then choose a core with a larger cross-sectional area and repeat steps 3 and 4. You could calculate core losses at this point, but they are quite small for this type of design.

Step 6—Measure or calculate the leakage inductance of the transformer. Although methods exist to calculate the leakage inductance, the results they yield are approximate, at best. Measuring this value after winding the transformer is usually simpler and quicker. If the number turns out to be unacceptably high, you have to perform another iteration. After doing a couple of pulse-transformer designs, you gain enough experience to quickly zero in on the final version.

For this example, I measured L_L to be 0.35 µH.

Step 7—Calculate the value for R_G.

You can calculate R_G by using Eq 2. A programmable calculator or a computer program that can solve equations is very helpful for this step. The desired damping factor is 0.707, which produces a good compromise between short rise time and minimum overshoot. For this example, the calculated value for R_G is 14.1 ohm. So, I used a readily available 15 ohm resistor.

Step 8—Check the rise time.

Calculate the rise time, t_R, using Eq 3. Realize, however, that this result is a minimum rise time and does not take into account the finite rise time of the source-which you must also consider. Ref 7 provides a method for calculating the total rise time, t_RT, including the effects of a finite rise-time source, t_RS.

If the calculated rise time is too slow, you can explore several options. First, try to adjust the damping resistor, R_ST. If in the limit, reducing this resistor to 0 ohm still does not give the desired rise time, then try to reduce the leakage reactance of the transformer. If neither produces the desired result, consider using a lower impedance driving source.

Step 9—Verify that the percent droop, P_D, is correct by using the exact value for K.

Previously, I assumed K was approximately equal to unity, and I calculated the percent droop upon this assumption. Now, use Eq 4 to calculate the exact value of K. Then, recalculate P_D by Eq 5 to verify that this assumption is correct. If K deviates appreciably from unity, go back to Step 2 and iterate until the new calculated value for K agrees closely with the old approximation for K.

Mathematical derivations provide background for models

Region 1-Rising-edge response Mesh analysis can solve the circuit in Fig 3a. The unit step function, u(t), represents the switch closing at t=0. Two simultaneous equations result, and Laplace transform techniques yield an expression for VO(s)/VI. The roots of the denominator of Eq 8 are the solution of the quadratic equation where a=1, and You have three possible cases to consider, depending upon the value of the discriminant of Eq 9. Taking the inverse Laplace transform, the resulting equations, in the time domain, are overdamped critically damped underdamped If b2>4ac, then the discriminant is real, and the roots of the equation are real and not equal. In this case, the response is overdamped. If b2=4ac, then the discriminant is zero and the resultant roots are real and equal. Here, the response is critically damped. Last, when b2<4ac, the discriminant is imaginary, and the roots are complex conjugate pairs. The circuit response is then oscillatory, with exponential damping. Substituting various values of damping factors into Eqs 10, 11, and 12, yields the graphs in Fig 3b of the rising-edge responses as a function of time. Region 2—Flat-top-of-pulse response Similarly, writing and solving the mesh equations of the circuit in Fig 4a leads to The set of exponential curves in Fig 4b comes from Eq 13, plotting normalized time on the horizontal axis and normalized voltage on the vertical axis. Expressions for the normalized voltage and normalized time are, respectively, You can make a useful approximation to Eq 13 if the argument of the exponent is small-which it is for most practical designs. Linearizing the expression using a Taylor expansion, Eq 4 approximates the normalized flat-top-of-pulse response. Region 3—Falling-edge response Solving the circuit in Fig 5 produces an expression for the falling-edge response. The procedure is similar to that of the rising-edge response, yielding an expression for normalized voltage: Eq 14 has roots, s, which are solutions to the quadratic equation, where a=1, and A handy additional quantity, d, is Partial-fraction decomposition and inverse Laplace-transform techniques can solve Eq 14. The results are similar to those obtained for the analysis of the rising-edge model. overdamped critically damped underdamped The damping factor is Region 4—Trailing-end region Solving the nodal equation for the trailing-end circuit model by Laplace-transform techniques results in where VL(O) is the voltage across the magnetizing inductance resulting from the initial current, IO. Solving for VL(O):

Design verification

The pulse transformer's measured parameters are

Core	Magnetics Inc
 	W4097-TC toroid
Turns	22 primary,
	22 secondary,
	bifilar winding
Wire	AWG #28
L	3.77 mH
LL	0.35 µH
RDC	0.12 ohm
tRT	120 nsec

Fig 7a shows the output of the pulse transformer (damping resistor R_G=15 ohm). The damping factor is close to xi=0.707. The rise time is short, and the overshoot is minimal. The pulse also exhibits a flat top, which indicates a small percentage of droop. The transformer preserves the fidelity of the input's drive signal.

By contrast, Fig 7b shows what results for the underdamped case, xi=0.3. The rise time is short, but the overshoot is approximately 40%. This much overshoot is dangerous in this application because the overshoot approaches the gate-to-source breakdown voltage of the MOSFET.

Fig 7c illustrates the result of a xi=4.5 damping factor. The figure shows that the rise time is longer than either of the other two examples and the edges of the pulse are significantly rounded off. The longer rise time translates to lower efficiency in driving a MOSFET because the device spends a longer time in its higher resistance active region.

Vincent J Spataro is a principal engineer for GEC Marconi Electronic Systems Corp. He has worked there for 10 years designing high-reliability power supplies and analog circuits. He has worked on guidance and navigation platforms and secure-communications terminals. He obtained a BS from Fairleigh Dickinson University-Teaneck, Teaneck, NJ, and an MS from Stevens Institute of Technology, Hoboken, NJ. In his spare time, he en-joys jogging, fishing, hiking, and spending time with his family.

References:

1. Millman, J and H Taub, Pulse, Digital, and Switching Waveforms, pgs 65 to 68, McGraw-Hill Inc, New York, NY, 1965.

2. Snelling, EC, Soft Ferrites-Properties and Applications, pgs 337 to 358, CRC Press, Cleveland, OH, 1969.

3. Fanagan, WM, Handbook of Transformer Applications, pgs 5.11 to 5.15, McGraw-Hill Inc, New York, NY, 1986.

4. Grossner, NR, Transformers for Electronic Circuits, Second Edition, pgs 403 to 406, McGraw-Hill Inc, New York, NY, 1983.

5. Snelling, EC, Soft Ferrites-Properties and Applications, pgs 290-292, CRC Press, Cleveland, OH, 1969.

6. Pelly, BR, "A New Gate Charge Factor Leads to Easy Drive Design for Power MOSFET Circuits," Application Note 944A, International Rectifier, El Segundo, CA.

7. Snelling, EC, Soft Ferrites-Properties and Applications, pg 271, CRC Press, Cleveland, OH, 1969.

8. PSpice circuit-analysis program V5.0, MicroSim Corp, Irvine, CA.