Design Ideas: March 16, 1995
The gated oscillator in Fig 1 holds its existing state when disabled rather than being forced high or low-a singular property. Further, you can generate an output at one-half the input frequency if you choose R1 and C so that the oscillator changes state just once when its input goes high. This configuration eliminates a flip-flop.
The circuit is similar to the standard CMOS two-gate oscillator. But this circuit has a selectable inverting or noninverting feedback path. When the control input (fIN) is low, only positive feedback exists. Therefore, the output remains in whatever state it was in when the input went low, and C gradually discharges to zero.
When the input goes high, the XOR gate becomes an inverter, and the circuit can now oscillate. C charges through R1 until its voltage reaches the threshold of the noninverting buffer. The buffer's output changes state, and C charges in the opposite polarity. Oscillation continues until the input goes low once more.
R2 limits the current through the protection diodes of the noninverting gate's input; setting R2 equal to R1 is convenient. The output frequency, fO, is roughly the inverse of 2R1C. Selecting components for the frequency-divider application is more complex. But, for symmetrical inputs, R and C are nearly the same as for the oscillator application. Otherwise, let R1C equal the high pulse's width. (DI #1674]