Design Ideas: March 16, 1995

A linear regulator is often a better choice for developing supply voltages below 3.3V than a switching regulator. At low output voltages and moderate currents, the linear regulator is less expensive and requires less pc-board area than a switcher. Yet, the linear regulator maintains reasonable efficiency. For example, the circuits in Fig 1 exhibit 87% min efficiency.

You may find that the specified dropout voltage for available low-dropout regulators is not low enough for this application. Therefore, Fig 1's circuits employ low-threshold, p-channel MOSFETs that drop only 300 mV at 2A. You should power the op amp and the 2.5V reference from a 5V bus. The higher voltage improves transient response by enabling the op amp to drive the MOSFET faster. The increased speed proves useful to the power-management circuitry of today's µPs. Such µP's can command load changes within tens of nanoseconds of sensing a needed change.

The 10-MHz op amp in Fig 1a accepts common-mode inputs from ground to within 1.9V of the positive rail-not enough headroom to operate a 2.5V reference from 3.3V. The 3.3V circuit in Fig 1b employs a 1.2V reference. This circuit provides±3% initial output accuracy and±5% regulation over the allowed extremes for line, load, temperature, and supply-voltage transients. The circuit in Fig 1a measures±2% for initial accuracy and±4% for the extremes. Both circuits' outputs change less than 1 mV for a 5% V_IN change and only 3 mV for a 0 to 2A load change.

Layout is critical if the circuits are to accommodate transient rise times faster than 100 nsec. The regulator should be close to the load, and the circuit should sense V_OUT at the load. The op-amp and reference ICs should share a single-point ground to prevent ground bounce and noise from upsetting the circuit's feedback loop.

Because the 10-µF output capacitors absorb the initial edge of any transient, these components, such as Sanyo Os-Con types, must have very low equivalent series resistance. To minimize the effect of lead inductance in surface-mounted capacitors, you can reduce their lead lengths virtually to zero by routing output current through the capacitors' metallized contacts. (DI #1671)