
To implement low-frequency digital filters, you can use low-power microcontrollers instead of dedicated DSP ICs. However, using 8-bit or even 16-bit math can quickly lead to significant filter dynamic-range errors and to complicated routines for precise digital-filter coefficients. By using a µC's 8-bit timer to set the sampling rate for a digital filter's data processing, you can obtain finer frequency resolution while using simple math routines.
| Table 1Lowpass frequency response | |
|---|---|
| Tsampling(sec) | Fc(Hz) |
| 0.0075 | 1.37 |
| 0.0080 | 1.28 |
| 0.0085 | 1.21 |
| 0.0090 | 1.14 |
| 0.0095 | 1.08 |
| 0.0100 | 1.03 |
| 0.0105 | 0.978 |
| 0.0110 | 0.933 |
| 0.0115 | 0.893 |
| 0.0120 | 0.856 |
| 0.0125 | 0.822 |
The circuit in Fig 1 uses a PIC16C71 µC that has an internal 8-bit ADC and an 8-bit timer. The circuit requirement is to provide lowpass filtering over a range of 0.85 to 1.25 Hz for compensating a variable-frequency mechanical system. This application placed other demands on the µC, including terminal software for factory calibration and data mapping and linearization of the output control. The circuit clocks the µC at 62.5 kHz, drawing very low power and giving the internal 8-bit timer a resolution of 64 µsec. By controlling the data sampling rate and using math routines comprising data shifts and additions, the filter the following equation describes yields the lowpass response in Table 1:
In contrast, changing the filter coefficients from 1/16 and 15/16 to 1/32 and 31/32, respectively, changes the cutoff frequency from 1.03 Hz to 0.505 Hz. This frequency change is equivalent to a change of 51% at a TSAMPLING equal to 0.00100 sec. Also, changing the coefficients produces smaller resultants, which ultimately reduces the filter's dynamic range. Alternatively, using the original coefficients and changing the sampling period to 0.010064 sec (one timer clock at 62.5 kHz) changes the cutoff frequency from 1.027 to 1.021 Hz, which is a change of only 0.6%. This change provides much more frequency resolution without sacrificing signal dynamic range.
Fig 1 includes an antialiasing filter before the ADC to provide the proper attenuation for high-frequency signals relative to the slowest sampling of the ADC, and a resistor-ladder DAC for the control output. The ZIPfile attached to EDN BBS /DI_SIG #1684 contains an assembly program for the PIC16C71 µC. The program's excellent documentation should allow you to roll the program over to another µC easily. (DI #1684)