Design Ideas: April 27, 1995
The circuit in Fig 1 increases the memory of Analog Devices' 2101 family of fixed-point DSP µPs. The simple scheme uses only three external static-memory devices and no glue logic. With the additional memory, the DSP µP will have 16k words of program memory and 15k words of data memory. (The memory totals include 2k words of internal program memory and 1k word of internal data memory.)
To interface properly to the DSP µP, the external memory must be 24 bits wide. Select the necessary three 32k-wordx8-bit static RAMs from Table 1 according to your DSP µP's clock speed.
| Table 1-External memory | |
|---|---|
| DSP processor memory speed (nsec) | External static clock (MHz) |
| 12.5 | 35 |
| 16.0 | 25 |
| 20.0 | 15 |
The program-memory-strobe (PMS) signal from the µP connects to the external memory's address line, A14, dividing the external memory space (32k words) into two equal blocks: external program memory (PMS=low) and external data memory (PMS=high). The two areas do not overlap.
The rest of the µP's control signals connect to the memory in the conventional way. The µP writes to memory using the data-write strobe (DWR) and reads from the memory when the data-read strobe (DRD) is active. Both DWR and DRD are active low. With chip select grounded, the memory devices are always selected.
For a lower-cost system, you can substitute 8k-wordx8-bit memory devices without changing your pc board's layout. With these devices, the PMS has no effect because each device's pin 1 is not connected. Now you can balance external program and data memory. The entire 8k-word device is available to the µP, beginning at address 0x2000 because the 8k-wordx8-bit memory device has a chip select, CS2 (active high), in place of the larger device's A13. (DI #1691)