| FIGURE 4 |
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| Fig 4—By using multiple rows of pins, Archistrat's VSPA significantly reduces the area a packaged IC requires on a pc board, yet spacing between solder joints is much greater than with other high-density peripheral-leaded packages, and package assembly can use conventional processes. This two-tier 144-pin VSPA is 64% smaller than a 128-pin QFP. Three-tier VSPAs are also in the works. |
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