
In some applications (for example, dynamic biasing of laser diodes), the use of digital potentiometers, or trimDACs, has limitations because of resolution, accuracy, or interface difficulties. Using the simple (but maybe not so obvious) vernier scheme in Fig 1, which comprises an X9241 quad electrically erasable potentiometer (EEPOT) and a bit of software, you can easily implement an 8001-tap-position, nonvolatile digital pot with typical tap-to-tap resolution of 0.008%.
The X9241 includes four 64-tap nonvolatile EEPOTs with a mechanism to serially cascade adjacent pots, thereby allowing as many as 256 distinct tap positions. However, if you cascade only two pots and use the remaining two pots to set the levels of VHCASC (Fig 2) and VLCASC, then you can attain a much higher degree of resolution. Because the wipers of the pots that set VHCASC and VLCASC must always be one position apart, 63 distinct voltage intervals are available to apply to the remaining cascaded pots.
The software in Listing 1 neglects one redundant tap position per interval when you set VW to tap 64. Ideally, another redundant tap position should exist when you make the transition between tap 127 of a voltage interval and tap 0 of the next voltage interval. However, these tap positions are not actually redundant, and their use can improve the linearity. With 127 distinct outputs for each of the 63 distinct intervals, 8001 distinct VW outputs are available between levels VH and VL.
Fig 2 illustrates the underlying concept of the scheme. POT0 and POT3 set the voltage interval for POT1/2 (1 and 2 cascaded). As the wiper position of POT1/2 moves up and down, the wiper positions of POT0 and POT3 adjust when necessary. If the wiper of POT1/2 increments beyond tap 127, then the wipers of POT0 and POT3 increment, and the wiper of POT1/2 returns to tap 0. The same holds true for decrements of the wiper of POT1/2 below tap 0: The wipers of POT0 and POT3 decrement, and POT1/2 becomes set to tap 127. The X9241 nicely suits this implementation, as you can change tap positions directly in software without making transitions through each intermediate position.
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Because of wiper-MOSFET loading and variations in the resistive elements of each pot, a piecewise-linear behavior appears in the transition between voltage intervals. Fig 3 shows the results of testing a circuit using a sample X9241 (49.37, 49.38, 49.32, and 49.24 kę). The graph shows the representative resolutions between adjacent taps. The use of low-offset, unity-gain buffers (Fig 4), as well as X9241 devices with well-matched POT1 and POT2, can improve the linearity at the expense of monotonicity.
To guarantee monotonicity for any X9241 device at the expense of resolution, you could adjust software-range transitions to occur between taps 127 and x (x>0). The finer resolution within each voltage interval would provide sufficient precision; however, connecting another pot as a rheostat between VH and the VH terminals of POT0 and POT1 adds a variable voltage drop for further "trimming" the output VW. The use of this pot is an alternative to the use of buffers. (DI #1707)