Design Feature: August 3, 1995
Systematic nodal or loop analysis is the universally adopted formal method of teaching network theory at the undergraduate level. Although the matrix algebra of formal network analysis is ideal for numerical computation on a computer, it fails when you're looking for analytical answers or trying to acquire more insight into a circuit's operation.
Consequently, for most analog-design engineers, the only route to a better understanding of circuits (with a goal of designing improved ones) is the slow process of cut and try. As you follow this route, you'll find yourself either breadboarding circuits or simulating them using CAD toolsbut not using the analytical methods you learned in school.
Professor RD Middlebrook, a consultant and educator at California Institute of Technology (Caltech), recognized this problem. He developed efficient analytical methods that derive faster and better analytical answers and avoid the horrors of runaway algebra (Refs 1, 2, and 3). One analytical method, which is called the Extra Element Theorem (EET), cuts through the algebra (see box, "The EET specialized to an impedance function"). For a general discussion and derivation of the EET, see Ref 2.
The circuit in Fig 1 is borrowed from a well-known textbook by LO Chua and Pen-Min Lin (Ref 4). In Fig 1, input resistance is to be determined as a function of the transconductance (gm) using the parameter-extraction method. Because the parameter-extraction method requires a considerable amount of matrix manipulation, which would become prohibitively complex if all elements were in symbolic form, Chua and Lin assigned numerical values to the resistors: R1=1 Ohm, R2=0.2 Ohm, R3=0.5 Ohm, R4=10 Ohm, and RB=0.1 Ohm. The resulting input resistance is
which can be rewritten by making the leading term in the numerator and the denominator unity:
Note from Eq 1b that if gm is 0, then Rin=0.7 Ohm.
The result of Eq 1b illustrates the shortcomings of tedious traditional analysis techniques. Matrix manipulation yields results for specific numerical values of network elements but fails to provide symbolic expressions for circuit parameters such as input resistance. As a result, matrix manipulation provides no insight into circuit operation. For instance, Eq 1b provides no information on how changes in R1, R2, R3, R4, and RB affect Rin.
However, you can determine such parameters in entirely symbolic form in a few simple steps using the EET twice in succession. The EET allows you to remove impedance elements and dependent sources from a circuit so you can restrict your analysis to a simpler circuit.
| The two elements that most complicate the analysis of this circuit are gmand RB. So, first take out the dependent current source by letting gm=0. This step produces the circuit in Fig 2, which is an ordinary bridge circuit with input resistance Rin'. In trying to determine Rin', note that RBis the only element left that causes difficulty, so take it out, too. Thus, you derive the circuit in Fig 3a. Note that |
Looking into the input port of Fig 3a immediately shows that R1 and R3 parallel R2and R4, so that
Now, two more simple calculations are required to determine Rin'. First, determine the resistance looking into port B, with the input port shorted as shown in Fig 3b. Note the parallel combination of R1 and R3 in series with the parallel combination of R2 and R4, so that
Second, determine the resistance looking into port B with the input port open (Fig 3c). Now, if you look into port B, you see R1+R2 in parallel with R3+R4 so that
According to EET, Rin' is

Substituting for Rin'', RS(B), and RO(B) in Eq 6, you obtain the following expression for the input resistance of a bridge circuit in which the influence of RBon Rinis very clear:
Important features of Eq 7 are that R1 through R4 appear in series and parallel combinations and that RB appears in a ratio that can easily be compared to unity. These features allow you to simplify an expression by ignoring the smaller of two series impedances or the larger of two parallel impedances. Similarly, in the expressions of the form 1+x/RBin Eq 7, you can ignore the x/RB term if it's small with respect to unity, or you can ignore the unity term if x/RB>>1. Eq 7 is called a low-entropy expression (Ref 1) because of its highly ordered nature.
In a second application of EET, reinstate gmby performing two additional simple calculations with the dependent current source gmv1replaced by an independent current source, im, pointing in the opposite direction (Figs 4a and 4b). First, determine the inverse gain (v1/im) (transresistance) with the input port shorted (Fig 4a). The current im of Fig 4a divides between RBand the R1 || R3 and R2 || R4 combinations according to the current division formula:
R1 and R3 are in parallel because of the short on the input, so they have the same voltage drop (i times R1 in parallel with R3) across them. Therefore, the reverse transresistance with the input shorted is
Next, repeat the same procedure with the input port open (Fig 4b). Using the current division formula between branches R1+R2 and RB in parallel with R3 + R4, you obtain
Substituting for Rin', AS(m), and A0(m) in Eq 10 yields the desired result:
The result in Eq 11 is superior to the result in Eq 1b, because it contains useful symbolic information about all the circuit elements. It is important to realize that not all symbolic expressions contain useful information unless their elements are grouped together in series and parallel combinations and ratios (Eq 11). If you were to use nodal or loop analysis, the result would have come out as a single numerator and a single denominator, each containing the sum of products of four resistances at a time. And the coefficient of gm would contain the sum of products of five resistances at a time.
Such a high-entropy answer not only would have been prohibitively unpleasant to obtain, but also would have contained no recognizable information about the circuit's operation. Obtaining a high-entropy result is precisely how engineers discover that nodal- or loop-analysis techniques fail to help them understand circuit performance, even if they were to carry out the analysis and survive the algebra.
In another example of how the EET can obtain a simple low-entropy result, the bridge circuit in Fig 1 can be made reactive by replacing RB with a capacitor CB (Fig 5). This circuit illustrates three important points:
Now reinstate ZB using the EET, which, in turn, requires that you determine port impedances RS(B) and RO(B), shown in Figs 7a and 7b, respectively. In Fig 7a, the current iT consists of the sum of gmv1 and the current through the branch made up of R1 in parallel with R3 plus R2 in parallel with R4. Therefore,
In Fig 7a, v1 is related to vT by the voltage division between R1 in parallel with R3 and R2 in parallel with R4. Therefore,
Hence, for RSB = vT/iT,
To determine RO(B), refer to Fig 7b, where, in this case, iT consists of the sum of gmv1 and the currents through the branches R1 + R2 and R3 + R4, so that
Because v1 is related to vT by the voltage division between R1 and R2, you can rewrite Eq 15a as



The elegance and simplicity of this derivation illustrate how, when the extra element is a reactance in an otherwise- resistive circuit, the pole and zero can each be determined independently. The EET can be applied to the process of determining any kind of transfer function, such as voltage gain, current gain, or loop gain, and can be extended to two or more extra elements (Refs 3 and 5). Note that this work was executed by the Jet Propulsion Laboratory at Caltech, under a contract with NASA.
| The EET specialized to an impedance function |
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In general, the Extra Element Theorem (EET) can be applied to the determination of any kind of transfer function, such as voltage, current, or loop gain, and can be extended to two or more extra elements. The following derivation is for an impedance function.
You could have made Z1 a short circuit instead of an open circuit, as in part b of the Fig A, in which case the EET
![]() would take the form
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You also could have set A to infinity, as is common for op-amp circuits, so that the EET would take the form ![]()
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Vatché Vorpérian holds a PhD from the California Institute of Technology (Caltech) Pasadena, CA, and is a technical-staff member of the Jet Propulsion Laboratory (JPL) at Caltech. For four years, he has assisted in developing spacecraft power supplies. Vorpérian is responsible for developing new technology and providing analytical support for the JPL's power-electronics group. His interests include reading and attending concerts.