Design Ideas: August 3, 1995
Noor Khalsa,
The data-acquisition system in Fig 1
draws approximately 2.2 mA at 3.6V. It consists of a state machine
that converts the synchronous serial data from the A/D-converter
chip into a standard baud rate framed with start and stop bits
for easy interface with a computer's COM port. The counter IC1A
controls the state machine; IC2 decodes the states.
The first step is to program the A/D converter by shifting four
bits into it. The counter IC1B counts the four bits;
these bits then shift from the analog-multiplexer IC5
into the A/D converter.
The second state of the state machine sends a start bit to the data_out line. The third state shifts out the last eight bits from the 12-bit A/D converter. Counter IC1B counts the eight bits, and the fourth state of the state machine inserts a stop bit. The sixth state starts another serial frame by inserting a start bit. Then, the circuit clocks the A/D converter eight more times, and the converter shifts out the last four data bits and four zeros. The A/D converter then receives another stop bit and, finally, a chip-select toggle to initiate another conversion cycle.
The logic at gates IC3 and IC4 simply determines whether the second counter IC1B needs to count four bits or eight before proceeding to the next state. Pin 7 of counter IC1A produces a read operation of the second A/D-converter channel on every other pass of the state machine by toggling the channel-select bit the analog multiplexer shifts into the converter.