| FIGURE 1 |
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| Fig 1— The classic approach to IRQ and DRQ monitoring (a) uses an edge-triggered flip-flop with a pulldown resistor. The PLD-friendly approach (b) uses an asynchronous latch with an input capacitor. |
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| FIGURE 1 |
|
| Fig 1— The classic approach to IRQ and DRQ monitoring (a) uses an edge-triggered flip-flop with a pulldown resistor. The PLD-friendly approach (b) uses an asynchronous latch with an input capacitor. |
back |