EDN Access— 10.12.95 Circuit adapts signals for visual perception

Design Ideas: October 12, 1995

Circuit adapts signals for visual perception

Paul Johnson,
Qualcomm Inc, Escondido, CA

It's often advantageous to obtain a visual display of the activity of a digital logic signal. Ideally, such a display would possess the four attributes shown in Fig 1.

First, the display would extend brief periods of change in logic states to a period long enough for the eye to perceive (Fig 1a). For example, if a signal is at logic high and switches to logic low for a period of 100 nsec and then returns to a high state, the period of the low-state signal is too short for the eye to perceive. The logic-low period should be at least one-sixtieth of a second, but, ideally, should be one-twentieth of a second. Second, the display should be equally perceivable for high-to-low-to-high and low-to-high-to-low transitions (Fig 1b). Third, the display should be equally perceivable for high-to-low-to-high and low-to-high-to-low transitions of any duration (Fig 1c). Finally, the display should immediately recover from brief transition periods (Fig 1d).

The combination of these four attributes allows you to perceive any combination of transitions. A periodic 100-kHz signal, for example, generates a 10-Hz display. If the display doesn't satisfy these attributes and simply shows the signal directly, the eye cannot perceive periods of change faster than one-sixtieth to one-hundredth of a second. Periodic signals faster than 60 to 100 Hz will appear as anything from a very dim to a very bright constant display, depending on the duty cycle of the signal. Fig 2 shows a circuit configuration that provides the four attributes.

The circuit consists of two gated, cross-connected monostable multivibrators (one-shots) that connect to a cross-connected NAND R-S latch. You can use a 74LS221 for the multivibrator and a 74LS00 for the NAND gates, for example. The circuit comprises one 16-pin package, one-half of a 14-pin package, two low-precision resistors, two low-precision capacitors, and the display.

The first one-shot detects high transitions, extends them to one-twentieth of a second, sets the NAND latch, and disables the second one-shot. The second one-shot detects low transitions, extends them to one-twentieth of a second, resets the NAND latch, and disables the first one-shot. When an appropriate transition re-enables either one-shot, the one-shot triggers again. The NAND-latch output generates the desired display. (DI #1775)