Design Ideas: October 26,, 1995
The low-cost, frequency-modulating buck regulator in Fig 1 uses an inexpensive CMOS ICM7555 timer and a low-cost, low-power rail-to-rail op amp. Because of the low power of these parts, the circuit can achieve efficiencies of more than 90%. Although you can combine many controllers with a high-side switch to achieve the same function, this circuit is cheap. Also, you can quickly build it from easily available parts.
The circuit works by first rectifying and filtering the ac line. The circuit can perform this function either directly or through an isolation transformer to ground-reference the circuit. The filter, which includes SW1, works as a voltage doubler. Closing SW1 for 90V- to 126V-ac inputs (low line for Japan to high line for North America) or opening the switch for 230V- to 248V-ac inputs (high and low line for Europe) produces a dc voltage of 252 to 352V.
The circuit bootstraps the ICM7555 CMOS timer between the gate and source of Q1's n-channel MOSFET. R1, C2, and D2 (a 12V zener) are the only components required for bootstrapping the power. Using timing components RT and CT results in a nominal frequency of 71 kHz. The optoisolator between pins 4 and 6 of the timer must have isolation of greater than 350V, which almost any optoisolator has. Also, a current transfer ratio of better than 1 is preferable. The CNY17-III is an example of a device that meets these requirements.
Like all buck regulators, D1's freewheeling diode needs as fast a recovery as possible. The diode must also be able to handle the maximum dc voltage and a current of ILOAD×(1-D). D is the maximum duty cycle, which is 50% here. L1 must follow the standard buck regulator rules that L=VDC3(VDC-VOUT)/10×fO×POUT). The output capacitor must have low effective series resistance. A 550-µH inductor rated at 5A, a 120-µF capacitor, and a MUR440 are suitable for this design.
The feedback circuitry consists of resistor divider R6 and R7 tied to VOUT, which drives the op amp's inverting input. R2, C3, and D3 (a 15V zener) provide the op amp's 15V supply voltage. R3, R4, and R5 divide this supply voltage to provide the op amp's reference voltage. Although not highly accurate, this reference often regulates to better than 5%—at little cost.
The op amp controls the current through the optoisolator's LED. When the error voltage is high (a heavy load), the op amp allows no current to pass through the LED. Under these conditions, the ICM755 timer works as close to 71 kHz and a 50% duty cycle as possible. As the error voltage approaches zero (for a light load), the op amp allows greater and greater current to pass through the LED. Then, a proportional current passes from the ICM7555 timer's supply to the timing capacitor, CT. The frequency of the system now shifts from near 71 kHz to near 0 Hz. However, the on-time of the n-channel MOSFET is always the same, regardless of the frequency. With almost no load, the frequency is close to 690 Hz. Under a 60W load, the frequency is 30 kHz, and the duty cycle is close to 30%.
This circuit does require a minimum load. The load must be greater than the current that flows through the bootstrapped timing circuit (approximately VDC/47k); otherwise C1 eventually charges to the voltage of the rectified ac input. For a VDC range of 240 to 360V, circuit efficiency ranges from 91.8 to 86.5% (% efficiency=(power in/power out)3100). Over that same range, VOUT ranges from 120.9% to 122.0V, and IOUT ranges from 490 to 492 mA. Output ripple is less than 200 mV. (DI #1754)