Design Ideas: October 26,, 1995
Unlike a typical missing-edge detector constructed from a retriggerable, monostable multivibrator (one-shot), the circuit in Fig 1 is programmable and accurate. Also, in the event of a missing-edge condition, the circuit generates a precision correction signal.
The circuit applies the input signal to be monitored to IC1 and IC2. These ICs produce a single positive pulse of approximately 450 psec each time a positive transition occurs. Using E-Lite logic, which is extremely fast, the circuit can detect input pulses of 700 psec or greater, independent of duty cycle. The output of IC2 resets IC3, thereby placing counter IC4 in the parallel-load mode. On the next rising edge of the free-running clock signal, the count value loads into IC4. IC3 clocks high, so that subsequent clocks will cause the counter to increment.
The counter continues to increment until one of the following two conditions occurs:
Should this condition occur, P0 goes from low to high, thereby adding 1 to the count value and causing the output of IC6 to assert the output MISSING. The second output of IC5, CORRECT, then begins supplying a corrected output pulse. This condition continues until the input signal is restored. Then, either IC2 or an external signal resets IC6, negating the missing signal and bringing the correct output back to its normally low state.
By ensuring the signal period is integrally divisible by the clock period as well as an odd value, the worst-case scenario is that this circuit will detect a missing signal within one clock period of failure. Once detected, the count value increments by 1, causing CORRECT to produce a one-clock-period-wide pulse every signal period.
Because the design uses high-performance logic, the clock signal can be as high as 500 MHz. This value means that the circuit can detect and correct a missing edge in approximately 2 nsec. Note: As with all high-speed designs, layout and placement of termination resistors are critical. (DI #1779)