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Design Ideas: November 23, 1995

Interface ties eight-channel ADC to 8050 µC

Dhananjay Vasudeo Gadre,
Inter-University Centre of Astronomy and Astrophysics
Pune, India


fig 1 thumbnailThe circuit in Figure 1 shows a precision, multiple-channel-ADC interface for the 8051 series of embedded controllers. The ADC interface is based on the MAX186 (Maxim Integrated Products (Sunnyvale, CA)) low-power, eight-channel, serial 12-bit ADC. The figure shows how you can connect the ADC's simple four-wire interface to an 80C32, an approach that results in compact code with reduced software overhead.

The MAX186 can operate in either internal- or external-clock mode. In the external-clock mode, the circuit must write a control byte into the DIN pin before any conversion can occur. The SSTRB output of the MAX186 goes high for one clock cycle after the control byte clocks in. The DOUT pin outputs the result of the conversion on the next 12 falling edges of SCLK. In the external-clock mode, the MAX186 requires that SCLK has a frequency between 0.1 and 2 MHz.

You can program the serial interface of an 8051-family processor to work in a variety of modes. The serial port supports the standard RS-232C protocol, a multiprocessor communication protocol, and a half-duplex synchronous-communication mode. This synchronous-communication mode (mode 0) is really a shift register, which you can use to shift data out or in at any given time.

The serial-port TxD and RxD pins work as clock and data, respectively. In this application, the ADC is configured to work with an external clock, which the serial port of the controller supplies. The clock output of the 80C32 serial port is one-twelfth the controller's clock frequency. To be within the frequency limits posed by MAX186, the controller needs to operate at frequencies between 1.2 and 24 MHz. The controller in this application operates at 11.059 MHz.

The ADC interface needs only a handful of components to connect to the 80C32. The power-on reset state of flip-flop IC2 enables buffer IC1A and disables IC1B. IC1B connects data from the controller to the MAX186's DIN pin. To initiate a conversion with the required configuration (channel number, etc), software writes a control byte into the serial-control (SCON) register of the 80C32. This byte clocks into the MAX186. To shift out 8 bits, the 80C32 needs eight controller clock cycles. Immediately thereafter, the serial port acts as an input shift register by setting bit REN in the SCON register. The first clock cycle triggers the MAX186 to pulse the SSTRB output. This output toggles the HCT74 flip-flop, which puts IC1A into the high-impedance mode and activates IC1B. Now, DOUT of the MAX186 connects to the data input of the 80C32.

fig 2 thumbnailListing 1's sample program reads the serial port twice to input 16 bits from the MAX186, which contains the 12 bits of the ADC. Figure 2a's timing diagram shows the transfer of the control byte from the 80C32 to the MAX186; Figure 2b shows the 80C32's acquisition of the converted 12-bit word. (DI #1794)




LISTING 1—SAMPLE PROGRAM SEGMENT FOR ADC-TO-µC INTERFACE
ORG 8000h

start:    mov scon, #00000000b     ; Initialize the Serial CONtrol reg
                                   ; Serial Port in MODE 0

more:     mov a,#0f1h              ; Load the MAX186 control byte
                                   ; D7 is DO for the MAX 186

          clr 0b4h                 ; pulse bit P3.4 to SET
          setb 0b4h                ; the flip-flop IC2. Buffer ICIA
          clr 0b4h                 ; is enabled so DATA travels

                                   ; from serial port to MAX186.

          cpl a                    ; invert the control byte
          mov sbuf,a               ; transmit it

          lcall delay              ; wait till it is shifted out

          clr ri                   ; enable and start reception
          setb ren                 ; 

          lcall delay              ; wait till 8 bits are shifted in

          mov a,sbuf               ; read the received byte
          mov dph, a               ; save it as MSB

          clr ri                   ; enable reception again

          lcall delay              ; wait again
          mov a,sbuf               ; read the received byte
          mov dpl,a                ; save it as LSB
          .
          .
          .
          .

delay:    mov r0, #02              ; small delay program
          djnz r0, $               ; so that total delay
          ret                      ; between serial port
                                   ; accesses is more than 8
                                   ; processor clock cycles

          END



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