EDN Access — The Design Information Source of the Electronics Industry


Out in Front: January 18, 1996


Register-rich FPGA targets coprocessor applications

The AT6010 coprocessor FPGA offers 6400 logic cells with a register in each cell, giving it more registers than any other FPGA available. The architecture of the device is a uniform 80×80 array of logic cells and interconnects. It has a maximum of 204 signal I/O pins. In addition to the device’s 20,000-gate capacity and the highest register count in the industry, the chip also features a flexible reprogramming capability for reconfigurable logic and coprocessor applications. You can configure the device in 1 msec or perform partial configurations at 200 nsec/cell. Furthermore, you can reconfigure the device while it is operating without losing data in registers or disrupting clocks. You can also reconfigure part of the device while the remainder of the device is operating.

According to the chip’s maker, the device can accelerate DSP or other processor-based systems by offloading computationally intensive, data-path operations from the main processor. Although the device can function as a 250-MHz shift register, maximum system speeds are closer to 100 MHz or less, depending on the complexity of the functions the system is performing. The company also promotes the use of "cache-logic" designs. Analogous to cache memory, in which currently used data reside in cache, cache logic places logic functions it currently needs on the chip. It stores the unused logic functions elsewhere in system memory. By transferring logic onto the chip only when the chip needs logic, the device can implement much larger designs compared with a static-logic implementation, in which all functions continuously need dedicated gates. The cache-logic-design approach lets the device compete with static-logic implementations requiring far more gates. The end result is to make the FPGA more cost- and power-efficient compared with static-logic-design approaches. The device’s design libraries are compatible with most major EDA tools. In addition, automatic component generators simplify creation of many standard functions, such as accumulators, adders, comparators, counters, decoders, and multipliers. The AT6010 is available now and costs $99 (1000). — by Doug Conner


Atmel Corp,
San Jose, CA. (408) 441-0311.



| EDN Access | feedback | subscribe to EDN! |
| design features | out in front | design ideas | departments | products |


Copyright © 1996 EDN Magazine. EDN is a registered trademark of Reed Properties Inc, used under license.