Out in Front: January 18, 1996
According to the chips maker, the device can accelerate DSP or other processor-based systems by offloading computationally intensive, data-path operations from the main processor. Although the device can function as a 250-MHz shift register, maximum system speeds are closer to 100 MHz or less, depending on the complexity of the functions the system is performing. The company also promotes the use of "cache-logic" designs. Analogous to cache memory, in which currently used data reside in cache, cache logic places logic functions it currently needs on the chip. It stores the unused logic functions elsewhere in system memory. By transferring logic onto the chip only when the chip needs logic, the device can implement much larger designs compared with a static-logic implementation, in which all functions continuously need dedicated gates. The cache-logic-design approach lets the device compete with static-logic implementations requiring far more gates. The end result is to make the FPGA more cost- and power-efficient compared with static-logic-design approaches. The devices design libraries are compatible with most major EDA tools. In addition, automatic component generators simplify creation of many standard functions, such as accumulators, adders, comparators, counters, decoders, and multipliers. The AT6010 is available now and costs $99 (1000). by Doug Conner
Atmel Corp,
San Jose, CA. (408) 441-0311.