EDN — 01.18.96 Graphics chip set uses UMA

Out in Front: January 18, 1996

Graphics chip set uses UMA

A new version of S3’s Trio64 graphics chip uses the unified memory architecture (UMA). UMA seeks to lower graphics costs by having graphics share main memory with the CPU. Graphics memory costs have begun to climb because chip sets are turning to wide memory buses to enhance display performance, increasing the number of memory devices a graphics design requires. Memory chips are also expanding in depth and cost, forcing smaller devices out of production.

The Trio64+ chip uses a 64-bit-wide bus and incorporates a 24-bit, 135-MHz RAMDAC. The chip connects to the CPU’s main memory and arbitrates with the CPU for memory access. The chip supports all the proposed arbitration standards for UMA, including VESA’s UMA standard.

The result of using UMA in the Trio64+ is a two- to three-times increase in block-transfer rates with some loss of CPU access to main memory. Test designs show that the UMA chip and CPU without level-2 cache operate at 90% the performance of a conventional 32-bit graphics design but at less than half the cost for the graphics subsystem. By using the saved cost to implement a level-2 cache, the graphics subsystem shows an increase in performance over the conventional design.

The chip offers several multimedia-acceleration capabilities in addition to graphical-user-interface acceleration. Its Streams processor offers on-the-fly stretching and blending of a primary RGB and a secondary RGB or YCrCb video stream. In addition, it offers hardware acceleration for Indeo and Cinepack compressed video and software-accelerated MPEG-1 decoding. The chip costs $25 (10,000) and comes in a 208-pin PQFP. — by Richard A Quinnell

S3 Inc,
Santa Clara, CA. (408) 980-5400.