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Out in Front: March 28, 1996

Synthesis tool optimizes for power

Addressing a hot new dimension of design synthesis, Synopsys has introduced Power Compiler, an EDA tool that optimizes ICs for power consumption. Power Compiler is an add-on to Synopsys’ Design Compiler logic-synthesis product and complements the company’s DesignPower power-analysis tool. You use DesignPower to do trade-off analysis early in the design at the register-transfer level (RTL) of a chip design. You then use Power Compiler for further design-power reduction after RTL optimization. Synopsys claims that benchmark circuits using an early version of the product reduced average power consumption 10 to 15%. After gate-level optimization and physical implementation, you use back-annotated interconnect parasitics and simulation vectors with DesignPower to get a more accurate analysis of power consumption.

For power optimization, you input your RTL-design description; switching activity; and constraints for timing, power, and area into Power Compiler. With the same switching-activity information as DesignPower, Power Compiler lets you add constraints for maximum dynamic and static (leakage) power. Using circuit activity, capacitance, and signal and clock transition times, the tool reduces power using techniques such as resizing cells, reordering combinatorial logic gates, swapping pins on gates, and refactoring logic to achieve equivalent Boolean functionality. The tool uses this information and a technology library to generate an optimized gate-level netlist. Power Compiler either estimates interconnect parasitics from the technology library or calculates them from placement and routing (P&R) data, if available. As you iterate your design through synthesis and P&R, you can reuse Power Compiler to further reduce power consumption.

Power Compiler runs on Unix workstations. Synopsys will offer it in limited production in July and expects to begin full production by September. Power Compiler costs $55,000. To use Power Compiler, you also need Design Compiler Expert, which costs $65,000.
—by Jim Lipman

Synopsys, Mountain View, CA. (415) 962-5000.


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