EDN -- 05.09.96 DRAM delivers SRAM performance

Out in Front: May 9, 1996

DRAM delivers SRAM performance

Integrated Device Technology (IDT) and MoSys have created a DRAM technology that delivers equivalent performance to that of the pipeline-burst SRAM (PBSRAM) that a PC's level-2 cache uses. Like the PBSRAM, MoSys' MCache (IDT refers to it as "Fusion" memory) yields a 3-1-1-1 access rate for reads and writes at 66 MHz. MCache is fundamentally a DRAM architecture that is divided into multiple banks for faster access. Devices based on the Fusion technology employ proprietary techniques to eliminate the dependence on the access sequence, which results in a 40-nsec access time for a page miss. Because these devices are DRAM-based, refresh is still an issue. The two companies claim that refresh has only a 0.5% worst-case impact on performance, and the memory is inaccessible during the refresh cycle.

The first devices from IDT and MoSys are the IDT71F432 and MC80132K32Q, respectively. The compatible devices have a 32k332-bit organization. Their pinout is a superset of PBSRAM, allowing MCache and PBSRAM to be interchangeable in new designs. Four pins on the DRAM devices, identified as no connects on the standard PBSRAM specifications, are W/R#; RESET#; and two proprietary functions, labeled F0 and F1. F0 and F1 support the refresh operation and the handshaking between a system's core logic and the memory component. Intel (Santa Clara, CA) and Via Technologies (Fremont, CA) have announced core-logic support for the MCache devices.

The MCache devices operate at 3.3 or 5V and consume approximately 300 mW of active power, compared to 1W peak for PBSRAM. The IDT71F432 and MC80132K32Q are available in JEDEC-standard, 100-pin TQFPs and sell for $4 to $5 (10,000). IDT also offers 256-kbyte dual in-line memory modules (IDT7MPV6204/05) based on the IDT71F432.

—by Markus Levy

Integrated Device Technology, Santa Clara, CA. (800) 345-7015, www.idt.com.

MoSys Inc, San Jose, CA. (408) 321-0770.