Out in Front: May 9, 1996
Although controller circuits are usually a small portion of an ASIC or FPGA chipa single circuit that generally has fewer than 1000 logic gatesthey are on almost every type of chip. Most chips have more than one controller. Because controllers generate critical on-chip timing, you need to design them carefully to optimize their performance. By optimizing them near the beginning of a chip design, before synthesis, you save potential redesign time if synthesis and simulation reveal a problem. TriQuest's tools use special state-machine optimization algorithms to help you fine-tune your controller circuits at RTL.
TCA focuses on performance by letting you interactively explore controller configurations and providing a plot of timing and area results and estimating performance for each implementation you try. The tool improves controller designs using decomposition, state encoding, removal of unusable states, critical path optimization, and other techniques. In addition, TCA provides a hardware-description-language (HDL) testbench and a synthesis script, letting you output the optimized RTL controller description directly to a logic-synthesis tool. CDA contains a subset of TCA functions. CDA also has analysis capability but does not provide automatic controller optimization. The tool does, however, suggest how to improve the timing or area of your design. Like TCA, CDA also generates synthesis scripts and HDL testbenches for VHDL or Verilog simulation. DAT gives you a report based on a static-timing analysis of your controller design, saving you the time and effort to obtain similar information with simulation and test-vector generation.
TCA and CDA have starting prices of $24,000 and $10,000, respectively. Both run on Unix platforms. You can get a free copy of DAT by registering on the company's Web site at http://www.triquest-da.com.
by Jim Lipman
TriQuest Design Automation, San Jose, CA. (408) 288-5578.