Design Ideas:
May 23, 1996Dhananjay Gadre,
IUCAA, Pune, India
The circuit
in Figure 1 shows how you can connect an octal DAC
(MAX521) to a DSP µP (ADSP- 2101) using 2 bits of a port mapped into the data memory. The
interface circuit includes a 1 kV current-limiting resistor on the SDA signal line because
the DAC pulls the SDA line low in certain clock cycles. The SDA and SCL lines must be high
when the serial bus is not in use. The sample program in 
Listing 1
shows how to transfer a complete sequence of command byte, address byte, and a data byte
into the DAC. (Click here to download
DI_SIG, #1871.) 
Figure 2 shows
the timing diagram. (DI #1871)
| EDN Access | feedback | subscribe to EDN!
|
| design features | out in front | design ideas | departments | products |