Out in Front: May 23, 1996
Testing memory blocks requires much more than the standard stuck-at-one and -zero fault detection that most of a chip's circuitry uses. You also need to check memories for transition, coupling, and pattern-sensitive faults (those that may occur only for specific patterns loaded in the memory). Such testing is costly in engineer and tester resources if you attempt it with predefined test patterns when you are simulating the chip. BIST speeds designing and running embedded-memory tests. Mentor's MBISTArchitect lets you decide which memory BIST algorithms, including the common March C and March C+, you want the test circuitry to implement. This attribute lets you trade off test-application time versus completeness of test. The tool supports multiple memory blocks on one chip with a single BIST-control circuit. Another useful feature is MBISTArchitect's parallel application of test patterns. Generating the test patterns on a word rather than a bit basis speeds test execution, particularly for very deep memories.
You can buy MBISTArchitect as a stand-alone tool for use within a Mentor design flow or with chip-design tools from other EDA vendors. MBISTArchitect is in beta test and costs $55,000; Mentor plans production for the third quarter.
by Jim Lipman
Mentor Graphics, Wil-sonville, OR. (503) 685-7000.