EDN — 05.23.96 Electronic Design Automation

Electronic Design Automation: May 23, 1996

VITAL-95 simulator speeds development time.

The QuickHDL simulator complies with the IEEE VHDL Initiative toward ASIC Libraries (VITAL)-95 1076.4 standard, providing sign-off capability and a strong library-development environment to reduce development time and costs. The inclusion of VITAL packages in the QuickHDL simulation kernel speeds development as much as 153 with VITAL libraries in a gate-level design compared to other VHDL simulators. More than 25 ASIC and programmable-logic vendors provide VITAL 2.2b library support for QuickHDL. The simulator runs under SunOS, Solaris, HP-UX, and IBM RS-6000. The VHDL and Verilog versions of QuickHDL cost $15,500 and $20,000, respectively. Mentor Graphics, Wilsonville, OR. (503) 685-7000.

Software performs Verilog-enhanced cycle simulation.

Enhanced cycle simulation is now available for the FinSim Verilog simulator. Conventional cycle-based technology takes clocks into account for defining when the circuit must be evaluated. In contrast, the enhanced-cycle-simulation method considers general control signals to define areas of the circuit that can be simulated using cycle-based techniques. The enhanced simulator also uses timing information and state-dependent critical-path calculations to improve accuracy. Prices range from $995 to $20,000, depending on configuration and platform. Fintronic USA, Menlo Park, CA. (415) 325-4474.

Synthesis tool creates netlists for ORCA FPGAs.

The latest release of Synplify, a VHDL and Verilog logic- synthesis tool, adds custom technology mappers for ORCA 1C and 2C FPGAs, as well as Actel 1200XL and 3200DX; Altera MAX5000, MAX9000, and FLEX10000; and Xilinx XC5200 devices. When appropriate to the architecture and when there are high fan-out nets, Synplify automatically replicates logic or performs buffering to improve performance. List price is $8000 on a PC and starts at $16,000 on workstations. Synplify-Lite provides Verilog and VHDL synthesis to one FPGA at half the cost of Synplify. Synplicity Inc , Mountain View, CA. (415) 961-4962.

Microwave program analyzes radiation patterns.

Suitable for a variety of design applications, including waveguide and micro-strip components, filters, transitions, and connectors, the MicroWaveLab analysis tool offers updated functions for working with radiating devices. Near-field-to-far-field transformation determines the radiation pattern of an antenna based on the fields near the device. A features-based geometry system supports predefined and user-defined solid primitives and Boolean operations between primitives. You can also import geometry from DXF, IGES, and ACIS files. MicroWaveLab costs $20,000. MacNeal-Schwendler Corp, Los Angeles, CA. (213) 258-9111.

ASIC tool kit complies with VITAL and Verilog standards.

An open-ASIC-design environment that blends interfaces for major EDA vendors' tools lets you design and perform final silicon sign-off of a design for manufacture. The ToolKit, which is at the heart of the vendor's CoreWare methodology, includes VHDL, Verilog, standard-delay-format (SDF), and physical-design-exchange-format (PDEF) interfaces. The extensive CoreWare libraries comply with Verilog and VHDL standards, as well as with VHDL Initiative Toward ASIC Libraries (VITAL) '95. In its initial release, the ToolKit environment provides full synthesis support using Synopsys' Design Compiler. Verilog sign-off can be performed with the Cadence Verilog-XL simulator, Chronologic VCS simulator, Quad Motive static-timing-analysis tool, and the Mentor FastScan tool for automatic test-pattern generator/ full-scan insertion. The tool kit comes with the ASIC- design package. LSI Logic Corp, Milpitas, CA. (408) 433-8000.

Software tool provides 3-D interactive viewing.

VisFly, a 3-D CAD visualization tool, lets you "fly through" complicated scenes and around complex models in real time. Comprising a high-speed viewer and a model generator, VisFly processes large amounts of information from CAD databases and maintains real-time interactivity. The program offers interfaces to the I-DEAS Master series and Pro/Engineer for transferring CAD data. It also supports direct loading of many industry-standard model formats. You can import complex motion from major third-party kinematics and dynamics applications. VisFly, which runs on Silicon Graphics, Hewlett-Packard, and Sun workstations, costs $6900/seat. Engineering Automation Inc, Ames, IA. (515) 296-9908.

Logic-synthesis software improves Verilog HDL support.

Version 3.2 of the Galileo design environment, a tool suite for FPGA, CPLD, and ASIC synthesis, simulation, and timing analysis on Windows and Sun platforms, enhances its Verilog coverage. The software performs better optimization by automatically detecting full/parallel case and if-then-else structures. The software also reads more pragmas for better control over synthesis. In addition, Version 3.2 provides improved area and delay calculations for Xilinx 4K/5K and AT&T ORCA devices. Prices start at $9000 for Windows and $13,500 for Sun and HP 700 platforms. Exemplar Logic Inc, Alameda, CA. (510) 337-3700.

Timing tool spans state data types.

Version 2.5 of the WaveFormer accepts all types of waveform data, including multilevel logic and user-defined types. Moreover, using a dynamic VHDL script technology, the tool adds interoperability to all of your EDA tools and digital- test equipment. The WaveFormer combines a timing diagram editor and a digital stimulus generator. The Unix SunOS version costs $2000 for a floating license. The Windows 3.1/95/NT version costs $500. An evaluation disk is free. SynaptiCAD, Blacksburg, VA. (800) 804-7073.