
When you need to multiplex a large number of analog signals into an ADCas in medical, instrumentation, and other applicationsyou may find it difficult to find an appropriate ADC that has enough channels to fit your system's needs. You can add external multiplexers, but these normally require additional control lines from the CPU. Also, the time required for switching channels may limit the system's throughput rate. The circuit in
Figure 1 allows you to increase the effective size of an ADC's multiplexer without requiring any additional time or control lines from the CPU.
In the circuit, the output of a four-channel multiplexer drives each of the four analog inputs of the LM12434 data-acquisition system, thus expanding the total number of input channels to 16. IC1 can store as many as 32 conversions in its internal FIFO before the CPU must read the contents. An internal sequencer automatically switches IC1's multiplexer between conversions. After converting and storing the results from inputs IN0 to IN3, IC1 activates its interrupt output pin, INT. This signal indicates to the CPU that four new conversion results are available in the FIFO. The INT signal also automatically increments the counter that selects the next group of four analog signals to be connected to IN0 through IN3.
To ensure a known starting state for the counter, the STANDBY OUT pin connects directly to the clear pins of the counter flip-flops. The CPU resets the counter and the multiplexer by issuing a standby command to IC1. After programming and starting IC1, the CPU reacts to the INT signal by reading IC1's status register and conversion FIFO. The CPU can communicate with IC1 using an I2C, TMS320, 8051, or standard (SPI, Microwire) serial interface without any glue logic. The CPU reads conversions for inputs 0 to 3 in reaction to the first interrupt; for inputs 4 to 7 in reaction to the second interrupt; for inputs 8 to 11, 12 to 15, 0 to 3, and so on. The number of input channels quadruples transparently. The CPU does not need to use any additional control lines or perform any additional instructions between conversions.
You can easily adapt this technique for systems requiring a greater or lesser number of analog inputs and for ADCs with internal multiplexers of different sizes by varying the length of the counter and the size of the external multiplexers. For ADCs that generate an end-of-conversion signal or an interrupt after every conversion, simply expand the counter by a couple of flip-flops to further divide the events that increment the multiplexers' channels. (DI #1885)