Out in Front: June 20, 1996

IBM's Series 10000 FPGA family has what the company refers to as a "medium-granularity" architecture. Each logic cell offers more functionality than the fine-grained logic cells that Atmel's FPGAs use but less than that in the Xilinx 4000 family of logic cells. The first offering, available now, is the 16,000-gate IBM10016 device with a 56×56 array of 3136 logic cells. The family, which the company plans to release over the next year, will span from 8000 to 42,000 gates.

The logic cells are arranged in 8×8 blocks. Each logic cell has four inputs and three outputs. The cells use no look-up-table architecture but have a programmable-function core that performs all two- and three-input functions and approximately 80% of all four-input functions.

Other features include six global clock lines, three global reset lines, dedicated boundary scan, and dedicated I/O-routing resources around the periphery of the chip to allow flexible I/O pin assignments. The I/O pins have individually selectable fast or slow slew rates. Output drive is 24 mA.

The device is fully reconfigurable in less than 2 msec and is compatible with designs requiring partial reconfiguration while operating. It operates from 3.3 or 5V power supplies.

Design tools for the FPGA are available for PCs, Sun SPARCstations, and IBM RS/6000 workstations. The design tools are free to qualified customers. The IBM 10016 device costs $157 (1000).

—by Doug Conner

IBM Microelectronics, Burlington, VT. fax(415) 855-4121.