Design Ideas: August 1, 1996

The circuit in Figure 1 is a four-channel video-signal multiplexer. Eight-bit binary data (of which only 3 bits are used) from a PC's parallel printer port controls the multiplexing operation. The inputs for all the channels are ±2.5V signals. Channel 0 is a reference channel, for which you can set any voltage level from -2.5 to +2.5 for dc-calibration purposes. The voltage gain for input frequencies from dc to 100 MHz is 0.98 minimum and is typically 0.99.

The 75(ohm) passive termination at the inputs is useful in reducing the effects of reflections for pulsed high-frequency signals coming from a 75(ohm) cable. You can use the multiplexer for small signals with frequencies ranging to 300 MHz, provided you use proper grounding and layout procedures. You select channels 0 to 3 by storing the appropriate data code in the LPT1 port's data latch (see Table 1). The multiplexer decodes data bits D0 and D1. After decoding, a logic one one on D4 effects channel selection. The output assumes a high-impedance state with a logic zero on D4. (DI #1906)