Design Ideas: September 2, 1996

In many recent systems, you often need to interface 3V signals with higher voltages within the system. In some cases, it's necessary to interconnect 3 and 5V open-collector transceivers.Figure 1 shows one example, in which multiple multidrop communications devices interconnect. In systems where no control lines are available for interfacing, the translating transceiver must control other transceivers by sensing data arriving from both sides. When no direction or driver-status line is available to control the transceiver, it's necessary to sense the active driver and use the sensed signal to control the interface. The design in Figure 2 uses two analog comparators with shunt resistors to determine which side of the transceiver is active.

Two divider networks, R₁/R₂ and R₄/R₅, bias the comparators to ensure that the outputs are stable in all states and also to ensure that the comparators do not latch in their back-to-back configuration. If neither side of the circuit is sinking current (has no data flow), the pull-down resistors, R₁ and R₄, ensure that the inverting-input voltage is lower than the noninverting input by an amount equal to at least the maximum offset voltage of the comparator. When either side of the network switches low, the corresponding open-collector comparator has a higher voltage on its inverting input than on the noninverting input, due to the current sourced by either pull-up resistor R₂ or R₅. The low-level signal passes to the other side of the transceiver, yet, the other comparator does not turn on, because its inverting input remains lower than the noninverting input due to the current sourced by either system pull-up resistor R_A or R_B.

When selecting comparators, you must take a few critical specs into consideration. The most important parameter is the common-mode input range of the devices. If you use a shunt current-sense design, as shown here, you must ensure that the common-mode range includes the positive supply rail, otherwise unpredictable operation can result. Two comparators that satisfy this common-mode requirement are the LMC7221 and the LMC6772. You must also consider the frequency of the transmitted signals. If a signal must remain synchronous with respect to a clock or other signal, the response time, or propagation delay, is an important consideration. If a signal is asynchronous, as is the case with a bidirectional signal from a UART, you need not be concerned with overall delay, but you must consider the comparators' skew.

Other specs to consider are the output-drive capability of the devices, the operating current, and the physical size. The LMC7221 comes in a SOT-23-5 miniature package; the equivalent LMC6772 comes in an SO8 or DIP. The comparators have a delay spec of 5 µsec. The circuit is ideal for asynchronous communications to a speed of approximately 100 kHz. You select the bias resistors in the design after considering pull-up resistors R_A and R_B. You select the value of the shunt resistor by considering the increase in the low level caused by the voltage drop in the shunt, as well as the delay of the comparator as a function of overdrive. To save power, you should bias the circuit using the lowest current, hence, the highest resistor values, that maintains the required performance specs. This design interfaces 3V to 5V; you can use the same structure to interface voltages from 2.7 to 15V. (DI #1914)