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Electronic Design Automation: September 2, 1996

Simulator bridges schematic and VHDL-based designs.

Active-VHDL, a VHDL IEEE 1076-93-compliant simulator for Windows 95 and Windows NT, allows concurrent editing and debugging of VHDL source code. Based on OLE automation, Active-VHDL lets you perform mixed-mode design entry and convert the entire design, comprising hierarchical schematic macros, state machines, or VHDL macros, into behavioral and RTL VHDL. The simulator works with an array of VHDL libraries, including IEEE, Synopsys, VITAL, and STD. The software also lets you define libraries and compile them from your own VHDL source code. Active-VHDL costs $1995. Aldec Inc, Henderson, NV. (702) 456-1222.


3-D field solver for IC nets works with Cadence place-and-route tools.

Release 2.0 of NET-AN, a 3-D field simulator for critical IC nets, reads Cadence Gate Ensemble, Cell Ensemble, and Cell3 files and allows back-annotation of delays using DSP and SDFs. These enhancements permit full integration of NET-AN into the ASIC-design flow. Once NET-AN extracts the RCL model for the net, a utility generates a complete HSpice circuit to obtain the delay values. NET-AN runs on Sun, Hewlett-Packard, and Silicon Graphics workstations. Prices start at $75,000 for a single-user license. OEA International Inc, Santa Clara, CA. (408) 738-5972.


Physical-optimization tool meets deep-submicron needs.

Using Solar design-optimization software, you can reduce the chip die size and achieve 30 to 40% faster IC performance in short runtimes on an engineering workstation. The deep-submicron-design software is tightly integrated with ArcCell, an all-path timing-driven place-and-route system. Solar runs on Hewlett-Packard and Sun workstations, with prices starting at $125,000. A high-performance option (HPO) for ArcCell-XO (extended option version) maximizes the performance and minimizes the area of complex digital and mixed-signal ICs. Prices for HPO start at $95,000. Avant! Corp, Sunnyvale, CA. (408) 738-8881.


Wireless design tools focus on ASICs.

The EnWave Wireless Design Solution addresses PCS, wireless-LAN, advanced-messaging, satellite-communications, and digital-cellular standards, such as IS-95, IS-136, and GSM. EnWave encompasses the vendor's core modeling and simulation environment and application-tuned libraries and analysis tools. Prices range from $88,000 to $157,500. Other offerings include the Fixed-Point Communications Library ($8000), the Filter Module Generator ($4000), and V3.5.1 of the Hardware Design System ($10,000). Alta Group, Sunnyvale, CA. (408) 733-1595.


Design kits come with CDMA/DECT behavioral models.

Two reference design kits enable CDMA and DECT system design in the COSSAP high-level DSP-design environment. The COSSAP CDMA kit includes examples, test benches, and behavioral reference models that support the EIA/TIA IS-95 standards for designing mobile phones and base stations for spread-spectrum digital cellular systems. The COSSAP DECT kit offers the same support for the European ETSI-DECT standard for designing indoor cordless telephones. The CDMA reference-design kit costs $20,000; the DECT kit sells for $5000. Synopsys Inc, Mountain View, CA. (415) 962-5000.


Windows software tackles high-frequency receiver design.

SysCad for Windows is an integrated environment for designing high-frequency receivers, as well as transmit and receive systems. With SysCad, you can incorporate amplifiers, mixers, filters, multipliers, data blocks, and lumped and distributed elements. Designs can be swept across both frequency and input power level. SysCad's UniSpur spurious analysis engine determines the spurious problem frequencies in receiving or transmitting systems of one-, two-, or three-frequency conversions. SysCad comes in native 32-bit format for Windows 95 and Windows NT. The software costs $995. Webb Laboratories, Brookfield, WI. (414) 367-6825.


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