Design Feature: September 12, 1996
| 8-bit chips |
| 16-bit chips |
| 32-bit chips |
| 64-bit chips |
Twenty-three years! That's how long EDN has been
delivering the an-nual microprocessor/microcontrol-ler directory. Each year, the
directory grows bigger and becomes more comprehensive. This year, we've devoted
54½ pages to this colossal database, so you'll probably find most, if not
all, of the information to get you started on your processor comparison.
This has been a busy year in the microprocessor/microcontroller industry. MIPS had its best year ever, shipping 5.5 million processors. Intel's PentiumPro won the EDN Innovation of the Year Award. In addition, several new architectures have arisen, yielding a variety of new devices. Some of the noteworthy new architectures are Motorola's 16-bit HC12, Mitsubishi's 32-bit M32R/D, and MIPS' R5000. Another interesting architecture, with products coming later this year, is LSI Logic's TinyRISC, a new 16-bit MIPS-compatible architecture. Sun is also bringing out Java cores, targeted at the embedded market and eliminating the need for a Java interpretor.
Following last year's format (reader feedback told us that we were on the right track), we've divided the directory into architectural and product sections. Architectural sections describe how the processor cores are put together; product sections cover register and instruction sets, pipeline stages, and power-management features. The spreadsheet-based product sections provide device-specific information, such as operating voltage and power consumption, peripheral sets, package types, and the ambiguous topic of pricing.
To get the most out of these tables, take a minute to review some of the assumptions we've made in compiling such vast amounts of specs and technical information:
Development-tool documentation: The development tool is one of the most important aspects of choosing a processor. When you call a company for information, be sure to mention the document number provided here to receive this valuable information.
Hardware multiplier: This category refers to an on-chip multiplier that is separate from a chip's FPU (if present), meaning that there is dedicated silicon that performs fast multiply (typically, single-cycle) and (sometimes) divide operations.
Maximum CPU frequency: Rather than including a range of operation frequencies, this category lists a processor's highest speed. You can safely assume that vendors offer lower speeds (which are less expensive) for most of their devices.
Maximum interrupt latency: The number of clock cycles from the interrupt assertion to the finish of the first complete instruction of the interrupt routine, assuming that the routine is not cached.
We're sure that you'll find plenty of useful and interesting information in the following pages. Please feel free to send your comments on this directory to markuslevy@aol.com, so that I can continue to improve the contents based on your inputs.