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Burr-Brown’s AFE1104 provides the active analog circuitry that interfaces between the DSP-based HDSL (high-bit-rate digital-subscriber-line) Sparow chip set from PairGain Technologies (San Diego) and the hybrid circuit and 1-to-2 ratio transformer of the twisted-pair line. The AFE1104 operates at bit rates of 196 kbps to 1.168 Mbps, supporting T1 and E1 requirements; its internal-filter responses and pulse-forming circuitry automatically scale with the operating-clock frequency.
The transmitting section of this device generates, filters, and buffers the outgoing 2B1Q-encoded data, using a linear, switched-capacitor, pulse-forming circuit and a differential line driver. The receiver filters and digitizes the data received from the line, via a difference amplifier; programmable gain amplifier; and 14-bit, 600k-sample/sec A/D converter.
This analog front-end IC in a 48-pin SSOP package requires a single 5V supply and dissipates 250 mW. It costs $10 (10,000). Soon-to-be-released versions will support HDSL chip sets from Brooktree Corp (San Diego) and Meta-link (Israel).—by Bill Schweber
Burr-Brown Corp, Tucson, AZ. (520) 746-1111, http://www.burr-brown.com.
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