Design Ideas

Waveform generator demodulates FM signals

Doug Vargha, Maxim Integrated Products, Sunnyvale, CA

The circuit in Figure 1 uses the phase-detector signals of a precision waveform-generator IC to perform FM demodulation. In a standard application, the IC's phase-detector input and output synchronize the chip's output frequency to that of an applied signal. If the signal is FM, you can extract the demodulated signal from the phase-detector output.

The waveform generator IC's phase-detector input (PDI) typically receives the phased-lock signal. The phase-detector output (PDO) then produces a duty-cycle-modulated train of rectangular current pulses that alternate between 0 and 500 mA. The duty cycle approaches 0% when PDI and the chip output (equivalent to the internal oscillator output) are in phase, 100% when they differ by 1808, and 50% as they approach phase quadrature (differing by 908).

In Figure 1, IC₃ demodulates the FM signal that IC₁ produces. Comparator IC₂ transforms the modulated carrier to a TTL/CMOS-compatible square wave that IC₃'s PDI requires. IC₁'s sync output also produces the square wave that IC₃ requires. However, this design uses external comparator IC₂ for the general case in which a source other than a MAX038 produces IC₃'s input. The 10V/100-pF filter at IC₃'s PDI terminal assures proper operation by limiting the rise time at PDI to 10 nsec.

The design sets IC₁ and IC₃ to the same center frequency using the 33-pF capacitor at COSC (pin 5) and setting the same current into I_IN (pin 10). IC₁'s output is frequency-modulated with a 10-kHz sine wave: The ±34-mV signal at IC₁'s FADJ input causes the output frequency to vary ±1% (±100 kHz) at a 10-kHz rate. Thus, IC₁ modulates the 10-MHz carrier with 10 kHz, and IC₃ recovers (demodulates) the 10 kHz.

Because the phase detector is a mixer, its output contains both sums and differences of the frequencies applied at its input. With the appropriate gain and lowpass filtering, therefore, the output stage excludes all but the original 10-kHz signal, which the circuit reproduces at the demodulated output. The 16.2-kV/100-pF feedback components at IC₄ set the pole of the lowpass filter. R_PD, C_PD, and R_Z set the PLL's gain and frequency response. (DI #1923)