Design Ideas

D/A-converter ASIC uses stochastic logic

J Quero, C Janer, J Ortega, and L Franquelo, University of Seville, Seville, Spain

To effect A/D and D/A conversion using ASICs, you usually need mixed-signal analog and digital processing. Mixed-signal silicon is more expensive than purely digital circuitry to process and test. In the case of FPGAs, you need external conversion circuits. However, it is possible to perform A/D and D/A conversions using strictly digital circuits. Figure 1 shows a dual 10-bit D/A converter that uses stochastic logic to provide the two converted analog voltages and their product.

In stochastic systems, the quantities to process are synchronous pulse sequences. A linear-feedback shift register (LFSR) generates pseudorandom numbers to compare with a digital representation of the variable. This digital comparison produces a stochastic signal whose value, at a given clock cycle, can randomly take a 0 or 1 value. The method codifies information as the probability, at a given clock cycle, of the pulse taking a high value. If you filter the stream of pulses, you obtain its dc component. The filter-noise power must be smaller than the power of the dc component of the least significant bit (LSB), otherwise it would make no sense to use an n-bit codification of the digital number to generate the stream of stochastic pulses.

The 3-dB cutoff frequency (f_MAX) of the lowpass filter used to extract the dc component of the stochastic signal and the clock frequency f_CLK are related by

where n is the number of bits used to codify the digital number to convert. The conversion time of the stochastic D/A converter depends on the analog-output filter. If you use only a first-order filter, the maximum conversion time is

As an example, if you set n=8 and f_CLK=40 MHz, it follows that f_MAX=2.441 kHz. Such a converter would have maximum conversion time of 2.27 msec, using R=42 kV and C=10 mF. Figure 2 plots the maximum conversion time vs the ASIC's clock frequency, for 8-, 9-, and 10-bit stochastic D/A converters, using a first-order lowpass filter. Listing 1 gives the VHDL code for a 10-bit D/A converter. You must initialize the LFSRs with different nonzero values. One of the advantages of using stochastic codification is that you can easily multiply the stochastic-pulse sequences. You need only one AND gate to obtain the product. You can also design a stochastic A/D converter by using a stochastic D/A converter and an on-chip successive-approximation register (SAR). A filter circuit and an analog comparator external to the ASIC provide the feedback signal to the SAR. (DI #1936)