Design Ideas November 21, 1996

Noise enhancer adds short noise pulses

Shyam Sunder Tiwari, Fiber Optics and Digital Imaging, Kalpakkam, India

  The circuit in Figure 1a eases noise detection by multiplying the number of pre-existing short noise pulses by two or three (Figure 1b). After the circuit multiplies these noise pulses, you can detect the noise as a decrease in the S/N ratio or as an increased pulse frequency.

  The circuit enhances noise but not the signal. Also, this noise multiplier has no influence on the number of broad signal pulses because the circuit does not multiply signal pulses of large width. If this circuit does not detect short noise pulses in the input signal, then it does not increase noise at the output.

  The circuit spots random, short-width (tw<20 nsec) pulses and increases their numbers in multiples of two or three according to S₁'s position. If you set S₁ to the "in-use" position, then the circuit multiplies the noise pulses by three. With S₁ in the "out-of-use" position, the circuit multiplies the noise pulses by two.

  Point A is the input to the circuit. The circuit feeds both the input and delayed-input signal into IC_1A, a fast OR gate. The four gates in IC₂ cause delays of approximately 15 nsec per gate. IC_1B combines these delayed-input signals to increase the number of noise pulses. You can observe the delayed output at test-point B, and point C is the final output. (DI #1950)  

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