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Design IdeasNovember 21, 1996 |
The circuit in Figure
1 generates random numbers using a linear-feedback shift register (LFSR).
The 16-bit LFSR consists of two shift registers, IC3 and IC4,
and the feedback circuitry comprising IC5A, IC6A, and IC6B.
The CLK2 signal clocks the output of the LFSR through IC7A.
The output of the LFSR is a pseudorandom sequence of the logical zeros and ones.
Combined with CLK2, an inverted version of the output sequence
latches the 8-bit counter outputs of IC1A and IC1B into
register IC2. The 16-bit LFSR produces 65,535-bit, maximal-length
pseudorandom sequences before repeating data. You can easily expand the length
of the LFSR and the number of random-number bytes.
The random-number generator works like a "wheel of fortune": The output of the LFSR randomly stops (latches) the output of IC1A and IC1B's spinning wheel. Thus, the rising edge of CLK3 latches a random number into register IC2 that is a product of the LFSR output and CLK2 signal. You can also use the falling edge of the CLK3 signal to indicate that the register has latched a new random number.
CLK1 and CLK2 have a few frequency requirements. The ratio fCLK1/(2nxfCLK2) must be irrational, where n is the number of counter bits. In other words, there should be no correlation between the CLK1 and CLK2 signals. Also fCLK1/2n must be much less than fCLK2.
An advantage of this random-number generator is that it produces totally unpredictable number sequences. This result is especially true if both CLK1 and CLK2 are outputs of imperfect clock generators. Instability of CLK1 and CLK2 due to time and temperature fluctuations increases the randomization of the output. One of the sequences this circuit generates is as follows: 13, 234, 13, 181, 229, 136, 191, 68, 95, 113, 249, 129, 195, 196, 52, 48, 61, 91, 231. (DI #1952)
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