| FIGURE 1 |
 |
| This simple circuit (a) and an accompanying program convert any duty-cycle input to a 50%-duty-cycle output over a 0.025-Hz to 20kHz range. Two counters in the µC's RAM alternately count up and down to produce the output(b) |
back |
| FIGURE 1 |
|
| This simple circuit (a) and an accompanying program convert any duty-cycle input to a 50%-duty-cycle output over a 0.025-Hz to 20kHz range. Two counters in the µC's RAM alternately count up and down to produce the output(b) |
back |