May 22, 1997

Simple boost converter generates ­27 and ­87V

David Feller, Harris Semiconductor, Dallas, TX

In modern telecommunications applications, the basic communications link to the home is becoming either digital or wireless. The normal circuitry to control a telephone is moving from the central office to the home. Subscriber-line-IC chips are thus moving to the home, and it is necessary to locally generate the power to control and ring the telephone. The simple circuit in Figure 1 generates the voltages necessary for a standard telephone. Generally, the required voltages are ­27V dc for active mode and ­80V dc from the 12V supply with a reasonably high efficiency and minimum parts count.

The circuit consists of a dual op amp, a FET, an inductor, a rectifying diode, and some output capacitance. Op amp IC_1A merely acts as an error amplifier, and the input resistors form a voltage divider. This amplifier tries to maintain a virtual ground on the amplifier's noninverting-input pin, so zero appears on that pin when the output voltage is correct. A 48-kilohms resistor would give ­48V, an 80-kilohms resistor produces ­80V, and a 27-kilohms resistor produces ­27V.

Obviously, you can change the output voltage by simply switching in different resistances to the bottom of the divider. The only precaution is that the switch needs to withstand a full 80V. A simple relay is the most straightforward method of switching. Note that you can use an spst relay if you place it across the 53-kilohms resistor. When open, the total resistance is 53+27=80 kilohms. When closed, the total resistance is 27 kilohms plus the contact resistance, which equals approximately 27 kilohms. This approach costs less than using an spdt relay with 27- and 80-kilohms resistors attached. The gain around the error amp is about 100 to set the supply's sensitivity and accuracy.

C₁ and either R₁ or R₂ form a simple multivibrator. The resistors at the noninverting input of IC_1B form a resistor divider that sets the comparator's trip point. Positive feedback skews the trip points to create some hysteresis. The op amp compares the trip points to a basic triangle wave generated by the resistors in the negative feedback loop acting on C₁. If the output is high, D₂ is reverse-biased and the total resistance between the 12V output and C₁ is a little more than 1 Megohm. C₁ charges to the high trip point and causes IC_1B's output to go low. This action forward-biases D₂, causing the total resistance between C₁ and ground to be approximately 5.1 kilohms, which quickly discharges the capacitor.

This alternating charge and discharge sets up the basic triangle wave that translates to a square wave at the amp's output that in turn sets the FET's on-time. If the voltage that the error amplifier detects is too low, simply precharging C₁ with the error amplifier through D₁ reduces the off-time. Figure 1b shows some important waveforms.

The rest of the circuit follows the well-understood equations of an inverting boost converter. When the FET is on, the rectifying diode is reverse-biased. The current in the inductor linearly ramps up at a rate of di/dt=V_IN/L. After the on-time, which is set by the time constant of the 5.1-kilohms resistor and 4.7-nF capacitor, the energy stored in the inductor is

where the peak current is

When the FET turns off, the inductor tries to maintain constant current, so the voltage across the inductor changes polarity, and the peak current begins to flow through the rectifying diode and the output capacitor. This action charges the capacitor to a negative voltage. If all of the energy stored in the inductor transfers to the output capacitor before the next turn-on period, the circuit operates in discontinuous mode. This operation is in fact necessary for stability of the control loop. The total power delivered to the load is

where T is the total period. Of course, P=V²/R, so the output voltage is

In this case, the on-time is constant, and the period varies, unlike a standard pulse-width modulator, for which the opposite is true.

The output capacitor must sustain the output current during an entire cycle of the FET without allowing excessive droop. Because this capacitor must support the entire output current most of the time, a fairly large value, such as 50 µF, is necessary. (DI #2034)

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